HK & LVPS for EUSO –TA / -Balloon G. Medina-Tanco, L. Santiago, H. Silva Lopez, F. Trillaud, C. Lopez, J. Rojas, A. De la Cruz, S. Guerrero, G. Leon.

Slides:



Advertisements
Similar presentations
Presents The Silver Family An Integrated Approach to Processors, Data Communication and Head End Integration.
Advertisements

MICE Electronics Update Mice Target Workshop – Dec 2010 P J Smith James Leaver.
1 Project supervised by: Dr Michael Gandelsman Project performed by: Roman Paleria, Avi Yona 12/5/2003 Multi-channel Data Acquisition System Mid-Term Presentation.
BTeV RICH HV System. The RICH HV System Power One 24V – 1.2A TNG Matsusada HVPS HPD.
Project Improvement Ideas Brian Drost Bangda Yang.
Spring 2002EECS150 - Lec02-CMOS Page 1 EECS150 - Digital Design Lecture 2 - CMOS January 24, 2002 John Wawrzynek.
ESE Lab Computer based Temperature Control Sid Deliwala, ESE Labs.
Aztec PC Oscilloscope Michael Mason Jed Brown Josh Price Andrew Youngs.
Target Controller Electronics Upgrade Status P. Smith J. Leaver.
CR1000s are only one part of a data acquisition system. To get good data, suitable sensors and a reliable data retrieval method are required. A failure.
PowerBench Programmable Power Supply Dror Lazar Moran Fishman Supervisor: Boaz Mizrahi Winter Semester 2009/10 HS DSL.
P07301 Summary Data Acquisition Module. Team Members.
Helicopter Data Acquisition System ECE 4522 Senior Design II.
Module 2: Hardware and Terminology
- Grounding - Harness Shielding - PDM Electrical Architecture - DP Electrical Architecture EUSO-BALLOON DESIGN REVIEW, , CNES TOULOUSE Pierre.
EUSO-BALLOON CDR – Agenda (I). Internal interfaces overview Batteries and Low Voltage power Supplies PDM interfaces DP interfaces HK Interfaces List of.
ONYX Product Overview.
PH/DT MCP & MNO NEW MAGNET SAFETY SYSTEM HARDWARE Sylvain Ravat PH-DT Xavier Pons PH-DT.
- Software block schemes & diagrams - Communications protocols & data format - Conclusions EUSO-BALLOON DESIGN REVIEW, , CNES TOULOUSE F. S.
EUSO BALLOON Battery Power Pack (PWP) RIKEN/UAH Héctor Prieto, Katsuhiko Tsuno, Marco Casolino.
Data processor description, development plan and risk analysis Giuseppe Osteria INFN Napoli Toulouse, February 2, 2012 Euso Balloon Phase A Review Giuseppe.
DESIGN OF THE HATCH OF THE INSTRUMENT BOOTH OF EUSO-BALLOON version v1.2 Writer : SYLVIE DAGORET- CAMPAGNE Final tests and Health tests1
ECE 477 Design Review – Spring 2010 Team 15. Team Members.
A* candidate for the power supply Wiener MPOD-LV crate w/ remote control only (except for local on/off switch) Type “EC LV” Front or rear connections (reverse.
- Where are the entry points of the instrument - Physical External links - Overview of the External Interfaces - Status - Conclusion EUSO-BALLOON DESIGN.
1 Warsaw University of Technology Faculty of Electronics and Information Technology Institute of Electronic Systems HARDWARE SIMULATOR of the high-resolution.
Electronics for PS and LHC transformers Grzegorz Kasprowicz Supervisor: David Belohrad AB-BDI-PI Technical student report.
BepiColombo/MMO/PWI/SORBET PWI meeting - Kanazawa 24/03/2006M.Dekkali MMO PWI Meeting Kanazawa University 24 th March 2006.
U.B. Presentation October Bernard COURTY L.P.C.C. College de France - Paris.
The PDM-block M. Casolino on behalf of JEM-EUSO collaboration EUSO-BALLOON Phase A review 2 nd February 2012, CNES, Toulouse.
Hardware Training Product: ITMS2.
1 Outline Firmware upgrade of the HV_LED_DAC boards. HV Status Bits board. Status of the board integration into the LHCb TFC system. CALO HV system and.
HOUSEKEEPING HK at Balloon-EUSO 10 th JEM-EUSO meeting from December 5 th to 10 th at RIKEN, Tokyo By G. Medina-Tanco*, A. Zamora, L. Santiago Cruz**,
EC_ASIC drawing (1) ASIC BASIC FASIC D 68 pi ns ASIC A 68 pi ns ASIC C ASIC E 120 pins ABCDEF 68 pi ns 68 pi ns 68 pi ns 68 pi ns.
CLIC and ILC Power Distribution and Power Pulsing Workshop Summary Document 10/5/2011G. Blanchot1.
MSS2 HARDWARE ASSEMBLY  FROM LAURENT DERONT. FORMAT STANDARD 6U CRATE  1 ST BACKPLANE INTERFACE CONNECTOR DB37 (Front side) TO DIN (Back Side) 1.
Serial Data Link on Advanced TCA Back Plane M. Nomachi and S. Ajimura Osaka University, Japan CAMAC – FASTBUS – VME / Compact PCI What ’ s next?
Acquisition Crate Design BI Technical Board 26 August 2011 Beam Loss Monitoring Section William Vigano’ 26 August
Programmable Logic Controller (PLC)
Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani.
HK-status. RS422 (diff) RS232 SPI Trigger rate Analog(V,T) >=4 Analog(V,T)
André Augustinus 16 June 2003 DCS Workshop General Purpose Monitor.
- Overview of the subsystems - The Photodetector Module and its components - The Data Processing and its components - The Power Pack - Summary of subsystems.
Assumptions: Cockcroft-Walton photomultiplier bases are the same for all ECAL sections Digital to analog converters are installed on the distribution boards.
0-10V Ballast Dimmer HDL-MRDA HDL-MRDA channel 10A DC0 - 10V output module is a multifunction control module. It has 6 channel relay.
Anomalies &/or differences with the configuration Explanations, analyzes, impacts Updates EUSO-BALLOON, Flight review 04/06/2014 Guillaume Prévôt (APC)
Task List  Group management plan  Background studies  Link budget: optical/electrical  Build, test learning Rx board  Order components for transceiver.
New digital readout of HFRAMDON neutron counters Proposal Version 2.
Submitted by:.  Project overview  Block diagram  Power supply  Microcontroller  MAX232 & DB9 Connector  Relay  Relay driver  Software requirements.
CONTENTS Objective Software &Hardware requirements Block diagram Mems technology Implementation Applications &Advantages Future scope Conclusion References.
Vehicle Monitoring System Michael Jermann Chris Blount Team: 35 TA: Justine Fortier.
Data Processor Status Hardware Giuseppe Osteria INFN Napoli Paris, October 12, 2012 Euso Balloon 8th progress meeting Giuseppe Osteria INFN Sezione di.
Michel DUPIEUX IRAP Progress Meeting LAL 02/03/ EC interface with PDM.
HVPS Configurations JEM EUSO Balloon Pierre Prat 17/09/2012.
Data processor Status Giuseppe Osteria INFN Napoli Paris, March 2, 2012 Euso Balloon 4th progress meeting Giuseppe Osteria INFN Sezione di Napoli.
Pierre PRAT Progress the Michel DUPIEUX.
Martin van Beuzekom, Jan Buytaert, Lars Eklund Opto & Power Board (OPB) Summary of the functionality of the opto & power board.
Arduino based Automatic Temperature Controlled Fan Speed Regulator.
RF section Control section Output Section Df Df Df CPU Hybrid LC
ECE 445 Smart Window Responding System
POWER SUPPLY FOR BELLE II PIXEL DETECTOR
Block Diagram Transmitter Receiver × 2 Transmitter Power Supply ADC
WIRELESS NETWORKING OF
Interfacing of LCD with µP
Front-end electronic system for large area photomultipliers readout
EVLA MONITOR & CONTROL CDR
Report on ATF2 Third Project Meeting ATF2 Magnet Movers ATF2 Q-BPM Electronics Is SLAC ILC Instrumentation Group a good name?
The QUIET ADC Implementation
We are working on developing “cheap” RTD monitoring channels for the CMS Phase-2 requirements. The channels will provide the complete readout for 4-wire.
Presentation transcript:

HK & LVPS for EUSO –TA / -Balloon G. Medina-Tanco, L. Santiago, H. Silva Lopez, F. Trillaud, C. Lopez, J. Rojas, A. De la Cruz, S. Guerrero, G. Leon

HK connections HOUSE KEEPING RS422 SPI High Level Command & Monitoring Signals Analog to Digital Conversion CPU RS422-RS232 converter SIREN CCB CLKB GPS PDMB HVPS SIREN [1 Open Drain output] 4 LVPS [4 Mon, 3 HL_Cmd] LENSES

HK connections HOUSE KEEPING RS422 SPI High Level Command & Monitoring Signals Analog to Digital Conversion CPU RS422-RS232 converter SIREN CCB CLKB GPS PDMB HVPS SIREN [1 Open Drain output] 4 LVPS [4 Mon, 3 HL_Cmd] LENSES Of course not needed in TA, but still available comm-channel if comm with TA or independent remote access is required Who turn HK on now? Anyway same protocol must be kept for HK On/Off.

HK Interfaces

HK module Individual boards’ functionality: PCB 05: LENSES, LVPS-PDM, LVPS-HK: (DC25-DB25). PCB 04: LVPS1-DP, LVPS2-DP: (DC37-DB25). PCB 03: SIREN-HK, CPU-HK, PDM-HK (DE9-DE9-DA15). PCB 02: CCB-HK, CLKB-HK: (DB25-DB25). PCB 01: POWER-HK, GPS-HK, HVPS-HK: (DE9-DA15-DA15).

HK module Back-lid (profile from Giuseppe’s module/CAD) CCADET-UNAM HK LVPS

HK production status Two HK’s were produced Currently 3 students from UNAM are at Naples for HK+LVPS integration with DP Duration of mision 3 weeks Module casing: delay of 3 days at production  will arrive next week by DHL

HK module boards & Arduino

HK Software

Software related to DP interfaces will be advanced during DP integration. HVPS we have a channel open & should not be a problem. PDMB there is nothing defined yet.

LVPS LVPS System: 4 boards implemented in 4 separate modules in DP rack Individual boards’ functionality: LVPS-PDM: PDMB[ON/OFF: HK] LVPS1-DP: CCB, CLK, GPS[ON/OFF: HK] LVPS2-DP: CPU (& DS) [ON/OFF: HK] LVPS-HK: HK[ON/OFF: SIREN] CURRENT Boards: input 28V NOT 110V But 110 V are AC not DC, yes? So, No-break/batteries in between ? WHO do this?

InterfacePower Consumption in W for Power Pack1 Power Consumption (changes) Power Consumption in W for Power Pack2 IR Camera 22 High Voltage Power Supply 22 LVPS DP13.3 LVPS DP24.2 Housekeeping66 LVPS-PDM3.5 LVPS-HK1.6 CPU12 CCB55 Data Storage88 GPS11 CLK33 PDMB (FPGA)7.28 PDMB-EC-ASIC10 Additional Spare 15 HeatersTBC Total LVP consumption LVPS-PDM Current TA board does not work with PDM if those values for PDM are final But still the margin of tolerance must be confirmed because it is too low: < 2%

DB25 (HK_BOARD) DE9 (PWR_PDMB) CONNECTORS ON LVPS_PDM FRONT PANEL DE9 (BATTERY) Dimensiones en mm Área efectiva enmarcada por línea azul

DB25 (HK_BOARD) DA15 (PWR_CPU) CONNECTORS ON LVPS2_DP FRONT PANEL DE9 (BATTERY) Dimensiones en mm Área efectiva enmarcada por línea azul

CONNECTORS ON LVPS_HK FRONT PANEL 92.4 Dimensiones en mm DA15 (HK_ON/OFF) DE9 (BATTERY) 10 DE9 (HK_MON) DE9 (PWR_HKB) 10 Área efectiva enmarcada por línea azul

CONNECTORS ON LVPS1_DP FRONT PANEL 92.4 Dimensiones en mm DE9 (CCB) DE9 (CLKB) 6.9 DC37 (HK_BOARD) DE9 (BATTERY) DE9 (GPSR) Área efectiva enmarcada por línea azul 10 En esta opción se le agregaron lo de 3 divisiones = 5.08x3 =

CONNECTORS ON LVPS_HK FRONT PANEL 92.4 Dimensiones en mm DA15 (HK_ON/OFF) DE9 (BATTERY) 10 DE9 (HK_MON) DE9 (PWR_HKB) 10 Área efectiva enmarcada por línea azul Agregar una subdivisión mas a los otros 3 submódulos sería otra opción = =

LVPS production status 1 LVPS set was produced

LVPS-PDM

PDM – Low Voltage Power Supply Board DC-DC of FPGA-PDM DC-DC of EC-ASIC Latching Relay of PDM Latching Relay of EC-ASIC DC-DC to power monitoring circuit Monitoring circuit (4 Operational amplifier built-in chip) Battery connector Power connector (to load) HK connector

HK – Low Voltage Power Supply Board Dual output DC-DC for ±12V-HK DC-DC for 3.3V-HKLatching Relay of 3.3-HK Latching Relay of 12V-HK DC-DC to power monitoring circuit Monitoring circuit (4 Operational amplifier built-in chip) Battery connector Power connector (to load) HK connector SIREN connector for Commands

DP – Low Voltage Power Supply Board #1 DC-DC for CCB DC-DC for GPSR Latching Relay of CCB Monitoring circuit (6 Operational amplifier TWO chips) Battery connector Power connectors (to load) HK connector To CCB To CLKB To GPSR Latching Relay of CLKB Latching Relay of GPSR DC-DC to power monitoring circuit DC-DC for CLKB

DP – Low Voltage Power Supply Board #2 DC-DC for CPU DC-DC for DTS Latching Relay of DST Latching Relay of CPU DC-DC to power monitoring circuit Monitoring circuit (4 Operational amplifier built-in chip) Battery connector Power connector (to load) HK connector