1. HVPS Configurations JEM EUSO Balloon Pierre Prat 17/09/2012

2. HVPS I/F configuration versions Version 1: page 3 (C-W gain commands provided by PDM_Board) – HVPS-1: HK SPI I/F + LVDS PDM_Board I/F + 28V 3.3V DC/DC CV – HVPS-2: 9 C-W Version 2: page 4 (C-W gain commands provided by PDM_Board) – HVPS-1: 3 C-W + HK SPI I/F + LVDS PDM_Board I/F + 28V 3.3V DC/DC CV – HVPS-2: 6 C-W Version 3 : page 5 (Internal C-W gain commands by D12 current measurement) – HVPS-1: 3 C-W + HK SPI I/F + 28V 3.3V DC/DC CV + FPGA/comparators/3 D12 current measurements – HVPS-2: 6 C-W + 6 D12 current measurements Version 4 : page 6 (Internal C-W gain commands by D12 current measurement) – HVPS-1: 3 C-W + 28V 3.3V DC/DC CV + FPGA/comparators/3 D12 current measurements – HVPS-2: 6 C-W + 6 D12 current measurements – HVPS-3: HK SPI I/F

3. D-Sub 37 M HVPS-2 HK BAT_RET (P) 28V_BAT (P) GND_28V (S) GND_3.3V (S) 28V (S) 3.3V (S) GND_M HVPS1 would have the DC/DC converters to isolate the powers needed by HVPS2 which would welcome the CW and switch system GND_M 0-2.44V STATUS ON/OFF CN9 CN4 CN3 CN2 22222222 9 DAC 6 Differential signals (LVDS) ( x2 = 18 wires) between HK and HVPS1 4 differential transmitters 2 differential receivers 22 CS_DAC CS_IO HVPS-1 MISO MOSI SCK MOSI 9 analog signals 9 bidirectional signals 9 status signals I/O expander s 4 differential transmitters 4 differential receivers PDM Board 16 wires MISO Interrupt SCK Interrupt HVPS-1 - HVPS-2 - HK - PDM-Board Interface Synoptic : version 1 3 D-Sub 9 F Micro-D 9 F D-Sub 15 F Micro-D 9 F D-Sub 37 F D-Sub 15 M Micro-D 9 M 9 C-W D-Sub 9M D-Sub 9 F D-Sub 9M BATTERY 4 differential signals (LVDS) between PDM Board and HVPS-1 x 2 = 8 wires

4. D-Sub 37 M HVPS-2 HK 1 2 BAT_RET (P) 28V_BAT (P) GND_28V (S) GND_3.3V (S) 28V (S) 3.3V (S) GND_M HVPS1 would have the DC/DC converters to isolate the powers needed by HVPS2 which would welcome 6 C-W and switch system GND_M 0-2.44V STATUS ON/OFF CN9 CN3 CN2 22222222 4 differential signals (LVDS) between PDM Board and HVPS-1 x 2 = 8 wires 9 DAC 6 Differential signals (LVDS) ( x2 = 18 wires) between HK and HVPS1 4 differential transmitters 2 differential receivers 22 CS_DAC CS_IO HVPS-1 MISO MOSI SCK MOSI 6 analog signals 6 bidirectional signals 6 status signals I/O expander s 4 differential transmitters 4 differential receivers PDM Board 16 wires MISO Interrupt SCK Interrupt HVPS-1 - HVPS-2 - HK - PDM-Board Interface Synoptic : version 2 4 D-Sub 9 F Micro-D 9 F D-Sub 15 F Micro-D 9 F D-Sub 37 F D-Sub 15 M Micro-D 9 M 6 C-W D-Sub 9M D-Sub 9 F D-Sub 9M BATTERY 3 C-W CN4 CN3 CN2 CN4 CN9 6 x 14 HV lines 3 x 14 HV lines 9 9 9 3 STATUS 3 ON/OFF 3 0-2.44V GND_M

5. 222222 D-Sub 37 M HVPS-2 HK 1 2 BAT_RET (P) 28V_BAT (P) GND_28V (S) GND_3.3V (S) 28V (S) 3.3V (S) GND_M HVPS1 would have the DC/DC converters to isolate the powers needed by HVPS2 which would welcome 6 C-W and switch system GND_M 0-2.44V STATUS ON/OFF CN9 CN3 CN2 9 DAC 6 Differential signals (LVDS) ( x2 = 18 wires) between HK and HVPS1 4 differential transmitters 2 differential receivers CS_DAC CS_IO HVPS-1 MISO MOSI SCK MOSI 6 analog signals 6 bidirectional signals 6 status signals I/O expander s 4 differential receivers MISO Interrupt SCK Interrupt HVPS-1 - HVPS-2 - HK Interface Synoptic : version 3 5 D-Sub 9 F D-Sub 15 F D-Sub 37 F D-Sub 15 M 6 C-W D-Sub 9M D-Sub 9 F D-Sub 9M BATTERY 3 C-W 3 0-2.44V 3 ON/OFF 3 STATUS CN4 CN3 CN2 CN4 CN9 6 x 14 HV lines 3 x 14 HV lines Comparators + FPGA 4 CN status 6 I-D12 analog signals 3 I-D12 analog signals 9 9 9 3 x 3 GND_M

6. 222222 D-Sub 15 M HVPS-2 HK 1 2 BAT_RET (P) 28V_BAT (P) GND_28V (S) GND_3.3V (S) 28V (S) 3.3V (S) GND_M HVPS1 would have the DC/DC converters to isolate the powers needed by HVPS2 which would welcome 6 C-W and switch system GND_M 0-2.44V STATUS ON/OFF CN9 CN3 CN2 9 DAC 6 Differential signals (LVDS) ( x2 = 18 wires) between HK and HVPS1 4 differential transmitters 2 differential receivers CS_DAC CS_IO HVPS-3 MISO MOSI SCK MOSI 6 analog signals 6 bidirectional signals 6 status signals I/O expander s 4 differential receivers MISO Interrupt SCK Interrupt HVPS-1 - HVPS-2 – HVPS-3 - HK Interface Synoptic : version 4 6 D-Sub 9 F D-Sub 15 F D-Sub 15 M 6 C-W D-Sub 9M D-Sub 9 F D-Sub 9M BATTERY 3 C-W 3 0-2.44V 3 ON/OFF 3 STATUS CN4 CN3 CN2 CN4 CN9 6 x 14 HV lines 3 x 14 HV lines Comparators + FPGA 4 CN status 6 I-D12 analog signals 3 I-D12 analog signals 9 9 9 3 x 3 GND_M D-Sub 15 M D-Sub 15 F D-Sub 15 M D-Sub 15 F 3.3V (S) GND_3.3V (S) HVPS-1 D-Sub 25 M D-Sub 25 F