Capstone Fall 2005 GFX-One Guitar Processor Team Carpal Tunnel October 6 th 2005

Capstone Fall 2005 Team Members  Mason Stone  Henock Negassa  Tony Sawyer  Nael Cassier

Capstone Fall 2005 Refresher: What is GFX-One?  GFX-One is a digital audio effects processor.  It is designed specifically for use with guitar, but can process any monaural analog audio input.

Capstone Fall 2005 Functional Block Diagram

Capstone Fall 2005 DSP Implementation  Will implement DSP using a Texas Instruments TMS Development Board  The board allows for easy configuration and testing of the processor functionality and effects routines

Capstone Fall 2005 Development Board Interface  The development board will be accessible to the rest of the system through an 80 pin memory expansion port  The processor will be accessible to the programmer through a JTAG USB port  The on-board codec (ADCs, DACs, mixer) will be bypassed in favor of components that we will lay out and implement

Capstone Fall 2005 DSP Core Software  Code Composer Studio will be the software package used to program the processor  The effects algorithms as well as all other code will be written in C++  Using the development board will allow for more effective debugging of our design code

Capstone Fall 2005 DSP Development Board

Capstone Fall 2005 DSP Development Board

Capstone Fall 2005 Communication with FPGA Memory Expansion Connector Memory Expansion Connector –External Memory Interface (EMIF)  16 bits data  6 bits address  Chip enable Peripheral Expansion Connector Peripheral Expansion Connector –2 Multi-channel Binary Ports (McBSP)  Accessed by reassigning multiplexer on-board  7 pins per port—don’t need all of them 3.3V Input/Output buffers 3.3V Input/Output buffers

Capstone Fall 2005 FPGA: Xilinx XC3S MHz oscillator input 20 MHz oscillator input –Digital Clock Manager (DCM) provides phase-locked clock inputs to A/D and D/A Communication with DSP board Communication with DSP board –EMIF –McBSP Data converters (A/D, D/A) Data converters (A/D, D/A) –Data format can be converted from I2C to McBSP User interface to LCD and Buttons User interface to LCD and Buttons JTAG Interface JTAG Interface

Capstone Fall 2005 FPGA: Xilinx XC3S400

Capstone Fall 2005 Schematic version of our FPGA

Capstone Fall 2005 Serial Interface

Capstone Fall 2005 Mixed Signal Interface Signal from Analog amplifier is fed to A/D Converter. Signal from Analog amplifier is fed to A/D Converter. Converts input voltage from analog signal in to Digital bit Converts input voltage from analog signal in to Digital bit Synchronized with 44.1KHz Clock Synchronized with 44.1KHz Clock 16 Bit digital signal 16 Bit digital signal MAX 195

Capstone Fall 2005 A/D schematic

Capstone Fall 2005 Mixed Signal Interface Digital to Analog (D/A) conversion methods Digital to Analog (D/A) conversion methods –Data is fed from DSP to D/A Converter. –Standard D/A converters translate an array of digital bits into a bias voltage –Synchronized with 44.1KHz Clock –16 Bit digital signal –I2c interface AD 1866

Capstone Fall 2005 D/A Schematic

Capstone Fall 2005 Analog Signal Mixer We are going to use voltage adder (summer) Op Amp circuit as analog signal mixer We are going to use voltage adder (summer) Op Amp circuit as analog signal mixer A good recording mixer lets you route a variety of input signals and combine them into one signal. A good recording mixer lets you route a variety of input signals and combine them into one signal. For a potential Add-on output signal from MP3 player will mix with signal from D/A converter For a potential Add-on output signal from MP3 player will mix with signal from D/A converter

Capstone Fall 2005 Audio Amplifier Analog signal from Mixer is going to be amplified and routed to speaker Analog signal from Mixer is going to be amplified and routed to speaker Amplifier is transistor based Amplifier is transistor based stereo audio power amplifier stereo audio power amplifier –0.3 V to 6 V supply –0.3 V to 6 V supply

Capstone Fall 2005 Power Regulated 3.3 and 2.5 V power buses from 9V DC adapter. Regulated 3.3 and 2.5 V power buses from 9V DC adapter. 5V 5V –LCD –D/A converter –A/D converter +5 & V 3.3 V –Compact Flash –Audio Amplifier –Data lines to and from FPGA –FPGA VCC 2.5 V 2.5 V –FPGA JTAG

Capstone Fall 2005 User Interface

Capstone Fall 2005 LCD Code

Capstone Fall 2005 LCD Code

Capstone Fall 2005 User Interface Schematic

Capstone Fall 2005 Project Schedule

Capstone Fall 2005 Division of Labor NameTask Nael Cassier User Interface/FPGA Configuration Mason Stone DSP Integration Tony Sawyer DSP Core Implementation Henock Negassa A/D Component Integration

Capstone Fall 2005 Hardware List ComponentPart NumberManufacturerQuantityOrdered? FPGAXC3S400-TQ144Xilinx2Yes DSP Starter KitTMS320C6713DSKT.I.1Yes EPROMXCF02V020CXilinx2Yes CLOCKEC1100HSTS MECLIPTEK2Yes A/DMAX195BEPEMAXIM2Yes D/AAD1866NAnalog Devices2Yes Audio AmplifierTPA6021A4T.I.2Yes 3.3V RegulatorLT1764AET-3.3Linear Technologies2Yes -5.0V RegulatorRadio Shack 2Yes 2.5V RegulatorRadio Shack 2Yes 5.0V RegulatorLM7805FairChild2Yes Level ShifterSN74LVC4245ADWRE4T.I.8Yes LCDCFAH1602ACrystalFontz2Yes Push ButtonsZF-2U-OA-CITT16Yes On/Off ButtonZF-2U-EE-CITT3Yes Audio JacksJB Saunders 6Yes Power Supply Adapter JB Saunders 1Yes Passive ComponentsJB Saunders N/ANo

Capstone Fall 2005 Milestone Deliverables Milestone 1 Milestone 2 Design Schematics Completed Solder PCB Board Layout Completed PCB Debug Completed PCB Ordered and Delivered DSP Code Completed (Alpha) LCD Code Completed FPGA Code Completed (Alpha)

Capstone Fall 2005 Questions?