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ECE 477 Design Review Team 2  Fall 2007. Outline Project overviewProject overview Project-specific success criteriaProject-specific success criteria.

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Presentation on theme: "ECE 477 Design Review Team 2  Fall 2007. Outline Project overviewProject overview Project-specific success criteriaProject-specific success criteria."— Presentation transcript:

1 ECE 477 Design Review Team 2  Fall 2007

2 Outline Project overviewProject overview Project-specific success criteriaProject-specific success criteria Block diagramBlock diagram Component selection rationaleComponent selection rationale Packaging designPackaging design Schematic and theory of operationSchematic and theory of operation PCB layoutPCB layout Software design/development statusSoftware design/development status Project completion timelineProject completion timeline Questions / discussionQuestions / discussion

3 Project Overview The Hooked on Harmonix system is a learning tool intended to teach the user how to play the keyboard. The system consists of a midi keyboard, a processing unit, and a display with speakers. The user will choose a song that he would like to learn. The song will then be played through the system speakers while the corresponding notes are streamed on the display. The user will then attempt to match the correct notes and timing using the keyboard to play the song. Hooked on Harmonix will provide dynamic feedback while the song is played to help the user improve his play.The Hooked on Harmonix system is a learning tool intended to teach the user how to play the keyboard. The system consists of a midi keyboard, a processing unit, and a display with speakers. The user will choose a song that he would like to learn. The song will then be played through the system speakers while the corresponding notes are streamed on the display. The user will then attempt to match the correct notes and timing using the keyboard to play the song. Hooked on Harmonix will provide dynamic feedback while the song is played to help the user improve his play.

4 Project-Specific Success Criteria An ability to (audibly) play and (internally) decode note/timing information from a pre-existing song/data file.An ability to (audibly) play and (internally) decode note/timing information from a pre-existing song/data file. An ability to decode/encode data output by a standard MIDI keyboard into a format compatible with the aforementioned song/data file.An ability to decode/encode data output by a standard MIDI keyboard into a format compatible with the aforementioned song/data file. An ability to display the notes the user should play based on data provided by the decoded song file (as mentioned above).An ability to display the notes the user should play based on data provided by the decoded song file (as mentioned above). An ability to compare user input from the MIDI keyboard with data generated by the decoded sound file on the basis of note/timing accuracy.An ability to compare user input from the MIDI keyboard with data generated by the decoded sound file on the basis of note/timing accuracy. An ability to calculate (and display) a performance score for the user based on the accumulated note/timing accuracy.An ability to calculate (and display) a performance score for the user based on the accumulated note/timing accuracy.

5 Block Diagram Flash (Config)

6 Component Selection Rationale MicrocontrollerMicrocontroller –FPGA For video output –SRAM, Flash, Clock can be external –DE2 Board available MemoryMemory –Video Buffering –Graphic and Audio Storage –FPGA Configuration

7 Packaging Design 6 x 6 x 2 inch box6 x 6 x 2 inch box Separate PeripheralsSeparate Peripherals –Monitor –MIDI Keyboard

8 Schematic/Theory of Operation I/O Sheet Power Sheet

9 Schematic/Theory of Operation Voltage Regulation (LD1117)

10 Schematic/Theory of Operation FPGA receives clock signal from an 80 MHz oscillator FPGA internally divides input clock into 40 MHz and 13.333 MHz signals Clock Frequencies (ASFL1)

11 Schematic/Theory of Operation Serial Configuration Device (EPCS64)

12 Schematic/Theory of Operation SRAM (IS61LV5128AL)

13 Schematic/Theory of Operation Cyclone II FPGA (EP2C20)

14 Schematic/Theory of Operation DAC – 8 Bit (ADV7123JST330) Converts digital RGB to analog VGA video

15 Schematic/Theory of Operation MIDI input through opto-isolator (6N137)

16 Schematic/Theory of Operation MIDI synthesizer LSI (BU8793KN)

17 PCB Layout – Overall Considerations Chip ArrangementChip Arrangement –SRAM: address and data busses –DAC: RGB digital video data –MIDI synthesizer chip EMI managementEMI management –Analog signals (DAC, MIDI out) –Clock signals Power and Ground pin outPower and Ground pin out –Bypass capacitors –Power and ground planes

18 PCB Layout – FPGA

19 PCB Layout – Voltage Regulators

20 PCB Layout - SRAM

21 PCB Layout - Flash

22 PCB Layout - Oscillator

23 PCB Layout – MIDI Synthesizer

24 PCB Layout - DAC

25 PCB Layout – Optical Isolator

26 PCB Layout – Headers/Jacks

27 Software Design/Development Status Load program from flash Load sprites from flash to SRAM Display song menu Song chosen? No Yes

28 Software Design/Development Status Load song from flash Pass note info sequentially to FPGA Watch MIDI input Correct note in time tolerance? No Yes

29 Software Design/Development Status NoYes Increment score (show message) Decrement score (show message) End of song? Show final score No Yes

30 Software Design/Development Status Counter process used for song timingCounter process used for song timing Pass pixel values from SRAM to DAC at appropriate pixel clock intervalsPass pixel values from SRAM to DAC at appropriate pixel clock intervals –40 MHz pixel clock for 800 x 600 resolution at 60 Hz refresh rate Send HSYNC and VSYNC signals during horizontal and vertical blanking periods, respectivelySend HSYNC and VSYNC signals during horizontal and vertical blanking periods, respectively

31 Project Completion Timeline Obtain All Parts Finalize PCB Populate PCB Sprites on screen Parse MIDI Bars Scrolling Bar Linked to MIDIPlay Comparison Software Complete OctoberNovember Week 3Week 4Week 1Week 2Week 3Week 4Week 5 VHDL Tutorials NIOS II Tutorials Output MIDI Menu Screens Scoring and Timing VHDL Complete Static Images Shown Key:C++VHDLPCB Debug PCB Hardware Complete

32 Questions / Discussion


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