© intec 2000 Reasons for parallel optical interconnects Roel Baets Ghent University - IMEC Department of Information Technology (INTEC)

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Presentation transcript:

© intec 2000 Reasons for parallel optical interconnects Roel Baets Ghent University - IMEC Department of Information Technology (INTEC)

workshop, February 2004 Overview Introduction Electrical interconnects: the limitations Optical interconnects: the merits Optical interconnects: the challenges Conclusion

workshop, February 2004 Interconnect: what ? Interconnects = transmission of information

workshop, February 2004 Optical interconnects Optical interconnects is a success for telecommunication long-distance (several km) shorter distance (tens to hundreds meters): data-communications (LAN) system-level interconnects (parallel optical datalinks) And shorter distance is electrical ?

workshop, February 2004 Electrical connections (1) Electrical tracks on PCB exhibit high loss Solution pre-emphasis driver = higher-power dissipation repeaters = higher power dissipation + more real estate 1m 8mil 50  stripguide with GETEK dielectric

workshop, February 2004 Electrical interconnects (2) Electrical connectors are large = a density problem Electrical connector at best 2 Gbps/mm2

workshop, February 2004 Progress electrical interconnects ITRS Roadmap 2003: chip-to board for peripheral busses is 5 to 6 Gbps for differential pairs in but limited to a small number of pins

workshop, February 2004 Optical interconnects ! Shorter-distance interconnects benefit from optical technologies ! A good reason for optical interconnects: optics is better than electrical interconnects in terms of power dissipation is distance independent data density: Gbps per mm2 is larger transmission distance: loss in fibre is negligible and data rate independent

workshop, February 2004 Parallel optics: merits Reduced power dissipation, especially for long-distance Typical power dissipation per link, for 2.5 Gbps, is 20-30mW Larger data density due to 2-D parallelism ! Electrical backplane connector is limited to 50 Gbps/cm Optical backplane connector allows >50 Gbps/mm2, thus few Tbps/cm ATCA backpanel extrapolated to 12.5Gbps line rate Assuming 250um pitch (smaller pitch is possible) B=B 0 A/L 2 (D.A.B. Miller)

workshop, February 2004 Parallel optics: merits Longer transmission distances optical loss is 5dB 2.5Gbps) Smaller chip size opto driver and receiver circuit is comparable to (or even smaller than) LVDS circuit (for given technology) Simpler system design !! optical path replaces high-speed electrical tracks, thus simpler packaging and PCBs optics is scalable: same transceiver for intra-board, board-to- board AND system-to-system interconnects !

workshop, February 2004 Optical interconnects ? So why is optics not yet inside your computer today ? Optics is a new technology (30 years younger than electronics), components are available only recently Optics integration requires different novel technologies, optics seems complex Performance of electrical interconnects is acceptable for current applications

workshop, February 2004 Optics: where and when ? According to different roadmaps, optical interconnects will be introduced in system around 2008: Source: INTEL (2002)

workshop, February 2004 Interfacing optics to CMOS Optical interconnect needs ED: digital CMOS circuitry EA: analog driver + receiver circuitry OE: light sources (or modulators) and detectors O: passive optical pathway (fiber, waveguides in board, free space) Options: EA+OE+interface to O in one package in some applications: ED+EA+OE+O in one package

workshop, February 2004 Building OE on electronic ICs Key challenges: integration of OE components on EA chips yield cost packaging of this chip to allow for interfacing to optical pathway alignment issues hermeticity issues thermal issues integration of optical interconnect into the IC design methodology

workshop, February Gbps 160Gbps 80Gbps 40Gbps On-chip optical access: roadmap Degree of parallelism 1.25Gbps 2.5Gbps 3.125Gbps 5Gbps 10Gbps CMOS technology 0.35um 0.18um 0.13um 90nm 4x88x8 2x8x8 16x Gbps 2x16x16 65nm 4x #channels Feasible today 8 1x82x8 4x8x8 640Gbps 1.2Tbps 2.5Tbps Feasible with future IC technologies Fine-pitch optics Line-rate (over backpanel !!!)

workshop, February 2004 Conclusions The road ahead Bridge the 30-years age gap with electrical interconnects (extra) proof of reliability Offer an integrated solution Bring all components vendors together Optimise performance of components to get an efficient and cost-effective link Cooperate with the end-user