1. Assembly and Packaging TWG
What has changed in the last 12 months?

2. What Has Changed In The Last 12 Months?
With the continuous shrinking of device features and the emergence of new device types everything is changing. A few key changes in the last 12 months are the focus of this presentation.
Change dictated by Moore’s Law scaling
Copper wire bonding moving toward volume leadership
Heterogeneous integration for SiP
2.5D moves the interposer into volume manufacturing
3D integration
Thinning
Photonics getting closer to the transistors
Requirements for packaging MEMS devices

3. Single Chip Package Technology Requirement
Challenges still remain for conventional single chip packaging
The continuous drive to reduce cost remains one of the most challenging requirements

4. Copper Wire Bonding Is Taking Over
Driven by:
Strong mechanical properties
Better heat dissipation
Increases power ratings
Thinner wire diameters
It is cheaper than gold
Improved process control in now delivering
No reliability issues
No yield issues
Some vendors don’t yet have this process control

5. Evolution Of Heterogeneous Integration: 2.5D a bridge to 3D
Time
WLCSP
FO-WLP
FO-WLP SiP
Heterogeneous Integration
IC + Assembly
MEMs & Wireless
Wirebond BGA
FC BGA
3D IC
die stack
Stacked Die
PoP
EPS
2.5D IC (Si Interposer)
Heterogeneous Integration
Assembly + Substrate

6. The Vision Of Complex Sip Is Finally Entering The Market
Sony’s CXD5315GG Package in PlayStation Vita
5 Layers in the stack
Processor
Wide IO SDRAM
2 mobile DRAM
Silicon spacer between the 2 mobile DRAM

7. Packaging is the enabling tool for “More than Moore”
Packaging is the enabling tool for “More than Moore”. It allows consumer products that are ever smaller, more powerful, cheaper, require less power and reliability ensuring a useful life that meets the expectation of the customer.

8. Why Has 3D TSV Taken So Long?
The typical response is:
Cost
Competition from existing technology
Technical inertia
Supply chain maturity
“Truth is” it has not been slow.
flip chip 30 years
copper wire bond 30 years
3D-TSV 6 years assuming 2013 for volume production

9. Why Has 3D TSV Been So Fast?
It has been driven by:
CMOS shrinking can no longer keep up the pace of progress
Enabling packaging technologies are available
Interposers
TSV
Performance advantages are compelling
Reduced power
Reduced latency
Increased bandwidth
Reduced size

10. Silicon Interposer
deals with a wide IO interface between devices e.g logic, memory, Fan-out interface from device to package/board high re-routing capability and TSV interconnects
SnAg bumps for FC Interconnects and Cu pillar bumps for board assembly

11. Interposers Are Now In Production
Interposer substrate has more than 10,000 routing connections
Compared with standard I/O connections it provides:
> 100X die-to-die bandwidth per watt
one-fifth the latency
Uses no high-speed serial or parallel I/O resources.
This is only 2.5D
Full 3D is even better

12. 3D Integration - TSV

13. 3D Products Are Sampling Today
Four layer stacks are sampling today.
The industry is getting ready for high volume with the next generation.
Greater density
Lower latency
Higher bandwidth

14. We Are Thinning Everything
What is driving this change?
Thinning is delivering what the consumer wants
Thinner devices and products
Flexible devices and products
Increases functional density
Stacking needs it
It is the key to low cost TSV
High yield cost effective thinning processes are available
Packaging challenges remain for cost effective handling of thinned die and wafers

15. We Are Thinning Everything
What is being thinned?
Wafers and die
Die attach layers
Lead frames
Underfill
Package substrates
Mold caps
Example: Total package height for BGA counting solder balls is 400um down from 500um a year ago.

16. Optical IO In-to And Out-of Package
There is a drive to move photonics as close to the transistors as possible to increase bandwidth and reduce power requirement
The challenges increase with each node due to large size of E to O and O to E conversion

17. MEMS Are Now Shipping For Diverse Applications
These products have unique packaging challenges and new solutions are being developed.
Package cost is often greater than 50% of product cost and cost remains a factor restraining broader adoption of MEMS solutions
Current state of the art production
MEMS oscillators
Sensors with ten degrees of freedom
3-axis gyro
3-axis magnetometer
3-axis accelerometer
Pressure sensor

18. Thank You