Organized by DSP Lab, Dept. of E & ECE, IIT, Kharagpur Sponsored by Texas Instruments (India), Bangalore A Training Programme on TI’s DSP Tools Lectures and Demonstrations by: Prof. R. V. Raja Kumar, IIT, Kharagpur Mr. S. V. V. Narayana Rao, TI, Bangalore Mr. G. Prakash, TI, Bangalore

IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE Schedule of the Training Programme Date: (Friday) Time: 4.30 to 6.30pm; Venue:F An Introduction to DSP tools: 4.30 to 5.15pm 2. An Introduction to CCS: 5.15 to 6.30 pm CCS Basic Introduction followed by CCS v2 features Instruction Set Simulator Overview

IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE Training Prog. Schedule (Contd.) Date: (Saturday) Time: 9.00 to 12.30pm; Venue:F CCS Features Demonstration : am Configuring Target Devices Developing a Simple Program Project Management Editing Techniques Debugging Tools Data Visualization Tea: to am Profiling Code Execution: 11.00am pm PBC Using GEL Language Simulating PinConnect and PortConnect DSP/BIOS Demo

IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE Training Prog. Schedule (Contd.) Date: (Saterday) Time: 1.30 to 4.45pm; Venue:F TMS320C5000™: The Personal DSP : 1:30 - 2:30 pm (World's Most Power-Efficient DSPs for Wireless Applications, C55x Architecture) 5. Demonstration Using DSK: pm Tea: 3.30 to 3.45pm Demonstration Using DSK(contd.): pm

Department of E & ECE Indian Institute of Technology, Kharagpur Phone: (O) (R) Fax: Introduction to DSP Tools Prof. R. V. Raja Kumar

Importance of DSP IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE Advantages of dig. Implementations: Flexibility of the hardware; high accuracy; large dynamic range, miniaturization; low power consumption. Developments in IC technology  No. of high speed and low power DSPs at low prices. Result  Increased use of DSPs for digital implementations DSPs are targeted for  speech processing, comm. systems and wireless, motor control, picture compression, robotics, control systems and general purposes.

Status of DSP Education DSP found its place in Engineering education both at undergraduate and graduate level, world over. But, the lab. practice in DSP has not gained enough momentum. Present lab. practice in DSP  simulation studies using high level languages like ‘C' and simulation packages like Matlab.  good for studying the performance of algorithms and schemes No practical implementation aspects like no. system, finite register length effects, optimization based on proc. Architecture... © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur

A Typical DSP system AnalogAnalog O/P I/P © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur Anti- Aliasing filter Sample & Hold ADCDSPDACLPF Sampling frequency x (t) x (nTs) x (n) y (n) y (t) y’ (t) A DSP system can be   Special purpose custom hardware  Digital signal processors (DSP's)  General purpose processors

Digital Signal Processors (DSPs)  A hardware MAC  MAC Ops in single cycle of the processor.  Simultaneous accessing of instructions and data  Hardware to facilitate low overhead looping or it. computation  On chip programmable and data RAM which are often accessi- ble from two different data buses  Hardware for multiple op’s performed in parallel in single cycle.  Fast interrupt and sequential and parallel input-output support  Application specific architecture Some of these features are in common with general purpose microprocessors. © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur

Families of Texas Instruments DSP’s IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE

Families of Analog Devices DSP’s IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE

Families of Motorola DSP’s IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE

Families of Lucent DSP’s IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE

DSP Processor Options for Lab. Fixed point processors: TMS320c2X, TMS320c5X and TMS320c62X (Modulators, demodulators, carrier and clock recovery etc.,) Floating point processors: TMS320c3X and TMS320c67X (Speech processing, control systems, equalization etc.,) one of C3X or C67X floating point DSPs and one of C5X or C62X may be the min. requirement for lab. practice. © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur

DSP Lab Tools (TI) Hardware tools: DSP (DSKs), evaluation modules (EVMs) and other DSP boards  For real-time DSP experiments, a DSK/EVM/Emu. is suitable along with a host system, which can be a typical PC. Software tools: Assembly language tools, DSP simulator, C compiler and C source debugger. Code Composer Studio (CCS)  IDE: Simulates, C compiles and works with a DSK © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur

DSP Software Development flow C Compiler Assembler Linker Debugging tools on a PC Cross-reference lister Absolute lister Hex conversion utility Library build utility Archiver To PC for Emulation C Source file Assembler Source COFF Object file Run time supp.Library Exec. COFF file Hexadecimal Object file To TMS320CXX target system Library of Object file IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE

C3X Evaluation Module (EVM) C30 host port D TBC host port D TBC SN74ACT8990 D Control Logic ADAD SRAM 16K x 4 AIC TLC32044 Analog buffer / amp PC Interface busPC Interface bus TMS320C30 Expansion bus Primary bus External flags Serial port 0 INT0 - INT2 Emulation Control Serial port 1 In Out 10-pin header IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE

Status of DSP Education C5X Evaluation Module (EVM) I/O Expansion Connector 64K SRAM Program / Data Host / Target Message Interface Analog Interface TLC32046 Emulation SN74ACT8990 (TBC) PC / AT Bus Interface TMS320C5X Control Serial Port D0-D15 A0-A15 TDM Port JTAG Emulation Port TDM port 10-pin header RCA Jack Analog Out RCA Jack Analog In IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE

Status of DSP Education C5X DSP Starter Kit (DSK) Expansion Connector 32K X 8 PROM Bootcode Analog Interface TLC32040 XDS510 Port 14-Pin Header TMS320C5X Control Serial Port D0-D15 A0-A15 TDM Port JTAG Emulation Port RCA Jack Analog Out RCA Jack Analog In IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE

DSP Simulator A DSP simulator simulates DSP environment on a computer like a PC without the actual DSP chip or hardware. It can accept DSP assembly language programs. The assembly language programs developed using the assembly language tools can be executed using a simulator, off-line. DSP based systems can be developed and tested using a simulator: Low cost Off-line testing © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur

C Compiler The C compiler converts a given program written in C language and produces the equivalent assembly language code.  No manual assembly language coding The so converted assembly code can be assembled, linked and used for implementing a system. Although, code generation can be done quickly, the code so generated is less efficient. © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur

Assembly Language Tools The assembly language tools create and use object files. The constituents are, Assembler: assembly lang. source files  m/c lang. obj. files (instructions, assembler and macro directives). Linker: Combines obj. files into single exe. Module. Archiver: Collects a group of files into a single archive file. Absolute lister: listing of absolute addresses of obj. file Cross-ref. Lister: shows symbols, their definitions and ref. In linked source files. © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur

Integrated Development Environments IIT Kharagpur © Prof. R. V. Raja Kumar Dept. of E & ECE

Code Composer Studio The CCS is an integrated suite of DSP software development tools efficient 'C6000 C compiler, Assembly Optimizer with the Code Composer IDE, Advanced Data Visualization, standard open APIs, DSP/BIOS and Real-Time Data Exchange(RTDX) Optimizing C compiler  fully exploits the architecture's instruction-level parallelism and orthogonal instruction set Assembly optimization  supports automatic scheduling, optimizing and separation of parallel tasks from linear assembly code Debugger  Conditional or hardware breakpoints are based on full C- expressions, local variables or CPU register symbols. Real-Time Analysis  Using RTDX technology, DSP/BIOS provides a real- time window into the target system © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur

C54X CCS Debugger © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur Memory map Data display Graphics Display Dis-Assembly window (Assembly source) C Source file Project files

C54X CCS Debugger © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur

A Setup for Non-real-time Experiments Assembly language code and implementation flavor is present, but real-time experiments cannot be carried out using this setup. © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur Host PC Code Composer Studio (IDE) or DSP Compiler / Assembler / Linker / Simulator / Debugger I/O through data files

A Setup for Real-time Experiments Assembly language code and implementation flavor is present. Real- time experiments can be carried out using this setup. © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur O/P I/P Signal gen. Head- phones Host PC CRO Code Composer Studio (IDE) or DSP Compiler / Assembler / Linker / Simulator / Debugger DSP EVM mic

Experiments on Familiarization with Tools Familiarization with floating point and fixed-point processor tools: DSP Simulator, C compiler, Assembly language tools and C source debugger and / or Code generation studio (CCS) DSK and or EVM along with any one or both of the above. Experiments: I/O signal handling through files, interrupt based processing, initialization of the DSK/EVM and I/O signal handling processor specific experiments involving registers etc. © Prof. R. V. Raja Kumar Dept. of E & ECE IIT Kharagpur

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