Digital System Design II 数字系统设计2

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Presentation transcript:

Digital System Design II 数字系统设计2 Weidong Wang (王维东) wdwang@zju.edu.cn Dept. of Information Science & Electronic Engineering ISEE Zhejiang University

Course Information Instructor: Weidong WANG TA: Email: wdwang@zju.edu.cn Tel(O): 0571-87953170; Office Hours: TBD, Yuquan Campus, Xindian (High-Tech) Building 306, /email whenever TA: mobile,Email: Hanqi Shen沈翰祺, 15067115046; 542886864@qq.com Jingjing Qian钱京京:13732254606/614589,qjj2857@163.com Office Hours: Tuesday & Saturday 14:00-16:30 PM. Xindian (High-Tech) Building 308.

Lecture 6 Floating Point Arithmetic For Computer

Arithmetic for Computers Computer numbers Binary numbers: word, half word, byte, bit What about fractions and real numbers? How bigger number? Arithmetic Addition, Subtraction, Multiplication, Division How does hardware really do? Real numbers Binary, decimal, real form Float number Floating-point arithmetic

Addition Binary addition Negation Added bit by bit From right to left overflow Negation Signed, unsigned Signed: 1111 1111 1111 1111 1111 1111 1111 1111 two= -1 ten Unsigned: 1111 1111 1111 1111 1111 1111 1111 1111 two= 4,294,967,295 ten Sign extension

Subtraction x-y=x+(-y) 7-6=7+(-6)=1 overflow

Multiplication 1000x1001=? Hardware Paper and pencil method 32-bit by 32-bit Product is 64-bit shift

Multiplication Algorithm

Multiplication version 2 Refined version 32 bits wide registers Product is shifted right Multiplier is in the right half of product register

Multiplication version 3 Faster version Unrolls the loop 31 adders Or Multiply in ARM ?

Division 1001010÷1000=? Hardware

Division Algorithm

Division version 2 Improved version 32 bits wide registers Product is shifted right Quotient is in the right half of remainder register Hardware architecture same as multiplication

Faster division version? Use many adders? Not Produce more bits of the quotient per step Guess Lookup table Correct wrong guess Not all computer ISA had division instruction

Floating Point Scientific notation Fractions or reals in mathematics Bigger than 32-bit integer Smaller than 1 Floating point normalized form: binary point

Representation Compromise F: fraction E: exponent S: sign

Double Precision Two words IEEE754 floating-point standard Exponent: 11-bit /8 Fraction: 52-bit /23 IEEE754 floating-point standard

Example: -0.75 -0.75

Example: binary Single precision Double precision representation

Floating-Point Addition Step 1 Align point of the number with smaller exponent Step 2 Addition of the significands Step 3 Adjust the sum to normalized scientific notation Step 4 Round the number

Addition Algorithm

Binary Floating-Point Addition Step 1 Shift right Step 2 Add Step 3 normalize the sum Step 4 Round the sum

Block diagram of addition

Floating-Point Multiplication Step 1 Adding the exponents Correct biased sum Step 2 Multiplication of the significands Step 3 normalize scientific notation Step 4 Round the number Step 5 Sign of product

Multiplication Algorithm

Binary Floating-Point Multiplication Step 1 Adding the exponents with biase Step 2 Multiplication of the significands Step 3 normalize scientific notation Step 4 Round the number Step 5 Sign of product

Floating-Point Instructions in MIPS Addition Single add.s Double add.d Subtraction sub.s, sub.d Multiplication mul.s, mul.d Division div.s, div.d Comparison c.x.s, c.x.d Where x maybe eq, neq, lt(less than), le(less than or equal), gt(greater than), ge(greater than or equal) Branch bclt(true), bclf(false) On separate floating-point registers $f0, $f1, $f2, ……, $f31 Load lwcl Store swcl

MIPS floating-point ISA

C to MIPS C MIPS Assume fahr in $f12, result in $f0, global pointer is $gp

Floating-Point Architecture in X86 xmm double precision 8 SSE2 registers as floating-point registers For multimedia 8-bit each color of pixel Eight 8-bit or Four 16-bit Arithmetic

Rounding Reading IEEE754 What is the Max number in 32-bit MIPS? What is the Max negative number in 32-bit MIPS?

summary IEEE754 floating-point standard Number in computer system

HomeWork Readings: HW4 Read IEEE754; Chapter 4.1 to 4.4 p.286: Exercise 3.4 P.289: Exercise 3.7 p.293: Exercise 3.12 p.296: Exercise 3.14