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Computer Organization & Design 计算机组成与设计

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1 Computer Organization & Design 计算机组成与设计
Weidong Wang (王维东) College of Information Science & Electronic Engineering 信息与通信网络工程研究所(ICAN) Zhejiang University

2 Course Information Instructor: Weidong WANG TA:
Tel(O): ; Office Hours: TBD, Yuquan Campus, Xindian (High-Tech) Building 306 Mobile: TA: mobile, 陈 彬彬 Binbin CHEN, ; 陈 佳云 Jiayun CHEN, ; Office Hours: Wednesday & Saturday 14:00-16:30 PM. Xindian (High-Tech) Building 308.(也可以短信邮件联系) 微信号-“计组”

3 Lecture 6 Floating Point Arithmetic
For Computer

4 Arithmetic for Computers
Computer numbers Binary numbers: word, half word, byte, bit What about fractions and real numbers? How bigger number? Arithmetic Addition, Subtraction, Multiplication, Division How does hardware really do? Real numbers Binary, decimal, real form Float number Floating-point arithmetic

5 Addition Binary addition Negation Added bit by bit From right to left
overflow Negation Signed, unsigned Signed: two= -1 ten Unsigned: two= 4,294,967,295 ten Sign extension

6 Subtraction x-y=x+(-y) 7-6=7+(-6)=1 overflow

7 Multiplication 1000x1001=? Hardware Paper and pencil method
32-bit by 32-bit Product is 64-bit shift

8 Multiplication Algorithm

9 Multiplication version 2
Refined version 32 bits wide registers Product is shifted right Multiplier is in the right half of product register

10 Multiplication version 3
Faster version Unrolls the loop 31 adders Or Multiply in ARM ?

11 Division ÷1000=? Hardware

12 Division Algorithm

13 Division version 2 Improved version 32 bits wide registers
Product is shifted right Quotient is in the right half of remainder register Hardware architecture same as multiplication

14 Faster division version?
Use many adders? Not Produce more bits of the quotient per step Guess Lookup table Correct wrong guess Not all computer ISA had division instruction

15 Floating Point Scientific notation Fractions or reals in mathematics
Bigger than 32-bit integer Smaller than 1 Floating point normalized form: binary point

16 Representation Compromise F: fraction E: exponent S: sign

17 Double Precision Two words IEEE754国际标准 floating-point standard
Exponent: 11-bit /8 Fraction: 52-bit /23 IEEE754国际标准 floating-point standard

18 Example: -0.75

19 Example: binary Single precision Double precision representation

20 Floating-Point Addition
Step 1 Align point of the number with smaller exponent Step 2 Addition of the significands Step 3 Adjust the sum to normalized scientific notation Step 4 Round the number

21 Addition Algorithm

22 Binary Floating-Point Addition
Step 1 Shift right Step 2 Add Step 3 normalize the sum Step 4 Round the sum

23 Block diagram of addition

24 Floating-Point Multiplication
Step 1 Adding the exponents Correct biased sum Step 2 Multiplication of the significands Step 3 normalize scientific notation Step 4 Round the number Step 5 Sign of product

25 Multiplication Algorithm

26 Binary Floating-Point Multiplication
Step 1 Adding the exponents with biase Step 2 Multiplication of the significands Step 3 normalize scientific notation Step 4 Round the number Step 5 Sign of product

27 Floating-Point Instructions in MIPS
Addition Single add.s Double add.d Subtraction sub.s, sub.d Multiplication mul.s, mul.d Division div.s, div.d Comparison c.x.s, c.x.d Where x maybe eq, neq, lt(less than), le(less than or equal), gt(greater than), ge(greater than or equal) Branch bclt(true), bclf(false) On separate floating-point registers $f0, $f1, $f2, ……, $f31 Load lwcl Store swcl

28 MIPS floating-point ISA

29 C to MIPS C MIPS Assume fahr in $f12, result in $f0, global pointer is $gp

30 Floating-Point Architecture in X86
xmm double precision 8 SSE2 registers as floating-point registers For multimedia 8-bit each color of pixel Eight 8-bit or Four 16-bit Arithmetic

31 Rounding Reading IEEE754 What is the Max number in 32-bit MIPS?
What is the Max negative number in 32-bit MIPS?

32 summary IEEE754 floating-point standard Number in computer system

33 HomeWork Readings: / Exercise / Read IEEE754; Chapter 4.5 to 4.10
p : Exercise 3.2, 3.10, 3.14; P : Exercise 3.19, 3.24,3.31;


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