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Computer Organization & Design 计算机组成与设计 Weidong Wang ( 王维东 ) College of Information Science & Electronic Engineering 信息与通信工程研究所 Zhejiang.

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Presentation on theme: "Computer Organization & Design 计算机组成与设计 Weidong Wang ( 王维东 ) College of Information Science & Electronic Engineering 信息与通信工程研究所 Zhejiang."— Presentation transcript:

1 Computer Organization & Design 计算机组成与设计 Weidong Wang ( 王维东 ) wdwang@zju.edu.cn College of Information Science & Electronic Engineering 信息与通信工程研究所 Zhejiang University

2 Course Information Instructor: Weidong WANG –Email: wdwang@zju.edu.cnwdwang@zju.edu.cn –Tel(O): 0571-87953170; –Office Hours: TBD, Yuquan Campus, Xindian (High-Tech) Building 306, /email whenever TA: –mobile , Email: »Lu Huang 黄露, 13516719473/6719473; eliver8801@zju.edu.cn »Hanqi Shen 沈翰祺, 15067115046; 542886864@qq.com542886864@qq.com »Office Hours: Wednesday & Saturday 14:00-16:30 PM. »Xindian (High-Tech) Building 308. (也可以短信邮件联系) 2

3 Lecture 6 Floating Point Arithmetic For Computer 3

4 Arithmetic for Computers Computer numbers –Binary numbers: word, half word, byte, bit –What about fractions and real numbers? –How bigger number? Arithmetic –Addition, Subtraction, Multiplication, Division –How does hardware really do? Real numbers –Binary, decimal, real form –Float number –Floating-point arithmetic 4

5 Addition Binary addition –Added bit by bit –From right to left –overflow Negation –Signed, unsigned –Signed: 1111 1111 1111 1111 1111 1111 1111 1111 two = -1 ten –Unsigned: 1111 1111 1111 1111 1111 1111 1111 1111 two = 4,294,967,295 ten –Sign extension 5

6 Subtraction x-y=x+(-y) –7-6=7+(-6)=1 overflow 6

7 Multiplication 1000x1001=? –Paper and pencil method Hardware –32-bit by 32-bit –Product is 64-bit –shift 7

8 Multiplication Algorithm 8

9 Multiplication version 2 Refined version –32 bits wide registers –Product is shifted right –Multiplier is in the right half of product register 9

10 Multiplication version 3 Faster version –Unrolls the loop –31 adders Or Multiply in ARM ? 10

11 Division 1001010÷1000=? Hardware 11

12 Division Algorithm 12

13 Division version 2 Improved version –32 bits wide registers –Product is shifted right –Quotient is in the right half of remainder register –Hardware architecture same as multiplication 13

14 Faster division version? Use many adders? –Not Produce more bits of the quotient per step –Guess –Lookup table –Correct wrong guess Not all computer ISA had division instruction 14

15 Floating Point Fractions or reals in mathematics Scientific notation –Bigger than 32-bit integer –Smaller than 1 –Floating point normalized form: binary point 15

16 Representation 16 Compromise F: fraction E: exponent S: sign

17 Double Precision Two words –Exponent: 11-bit /8 –Fraction: 52-bit /23 IEEE754 floating-point standard 17

18 IEEE754 floating-point number IEE754 floating-point number Negative exponent –Single precision biase=127, double precision biase=1023; 《 IEEE Standard for Floating-Point Arithmetic 》 –IEEE Std 754™-2008, (Revision of IEEE Std 754-1985), 29 August 2008, New York, NY 10016-5997, USA –Please check ftp://10.13.71.58 websiteftp://10.13.71.58 18

19 Example: -0.75 -0.75-0.75 19

20 Example: binary Single precision Double precision representation 20

21 Floating-Point Addition Step 1Step 1 –Align point of the number with smaller exponent Step 2Step 2 –Addition of the significands Step 3Step 3 –Adjust the sum to normalized scientific notation Step 4Step 4 –Round the number 21

22 22 Addition Algorithm

23 Binary Floating-Point Addition 23 Step 1Step 1 –Shift right Step 2Step 2 –Add Step 3Step 3 –normalize the sum Step 4Step 4 –Round the sum

24 Block diagram of addition

25 Floating-Point Multiplication Step 1Step 1 –Adding the exponents –Correct biased sum Step 2Step 2 –Multiplication of the significands Step 3Step 3 –normalize scientific notation Step 4Step 4 –Round the number Step 5Step 5 –Sign of product

26 Multiplication Algorithm 26

27 Binary Floating-Point Multiplication Step 1Step 1 –Adding the exponents with biase Step 2Step 2 –Multiplication of the significands Step 3Step 3 –normalize scientific notation Step 4Step 4 –Round the number Step 5Step 5 –Sign of product

28 Floating-Point Instructions in MIPS AdditionAddition –Single add.s –Double add.d SubtractionSubtraction –sub.s, sub.d MultiplicationMultiplication –mul.s, mul.d DivisionDivision –div.s, div.d ComparisonComparison –c.x.s, c.x.d –Where x maybe eq, neq, lt(less than), le(less than or equal), gt(greater than), ge(greater than or equal) BranchBranch –bclt(true), bclf(false) 28 On separate floating-point registers $f0, $f1, $f2, ……, $f31 Load lwcl Store swcl

29 MIPS floating-point ISA 29

30 C to MIPS C MIPSMIPS –Assume fahr in $f12, result in $f0, global pointer is $gp 30

31 Floating-Point Architecture in X86 xmmxmm –double precision –8 SSE2 registers as floating-point registers For multimediaFor multimedia –8-bit each color of pixel –Eight 8-bit or Four 16-bit Arithmetic 31

32 Rounding Reading IEEE754 What is the Max number in 32-bit MIPS? What is the Max negative number in 32-bit MIPS? 32

33 summary IEEE754 floating-point standard Number in computer system 33

34 HomeWork Readings: –Read IEEE754; Chapter 4.5 to 4.10 HW4 –p.225-226: Exercise 3.2, 3.10, 3.14; –P.227-228: Exercise 3.19, 3.24,3.31;


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