2 Ball-Grid Array FPGA’s

Slides:

Advertisements

Similar presentations

GlueX Collaboration Meeting June 3-5, GeV Trigger Electronics R. Chris Cuevas 1.Hardware Status  Production Updates 2.DAq and Trigger Testing 

Advertisements

An ATCA and FPGA-Based Data Processing Unit for PANDA Experiment H.XU, Z.-A. LIU,Q.WANG, D.JIN, Inst. High Energy Physics, Beijing, W. Kühn, J. Lang, S.

Ruben Carcagno - 5/3/2005 Simcon 2.1 DESY FPGA SIMulator and CONtroller Overview.

Detector Array Controller Based on First Light First Light PICNIC Array Mux PICNIC Array Mux Image of ESO Messenger Front Page M.Meyer June 05 NGC High.

Trigger-less and reconfigurable data acquisition system for J-PET

1 Design of the Front End Readout Board for TORCH Detector 10, June 2010.

Open, Scalable Real-Time Solutions Pentium Core Solo or Duo 1.6 to 2 GHz or Single or dual-core Pentium support in hard real-time up to.

Status and planning of the CMX Philippe Laurens for the MSU group Level-1 Calorimeter Trigger General Meeting, CERN May 24, 2012.

Uni-Heidelberg, KIP, V.Angelov 1 International Workshop TRDs – Present & Future September, Romania Wafer Tester, Optical Link, GTU V. Angelov Kirchhoff.

Atlas L1Calo CMX Card CMX is upgrade of CMM with higher capacity 1)Inputs from JEM or CPM modules – 40 → 160Mbps (400 signals) 2)Crate CMX to System CMX.

PHENIX upgrade DAQ Status/ HBD FEM experience (so far) The thoughts on the PHENIX DAQ upgrade –Slow download HBD test experience so far –GTM –FEM readout.

Open, Scalable Real-Time Solutions Intel Core 2 Duo to Quad processor up to 5 VIRTEX II Pro FPGA board RT-LAB, SIMULINK, RTW, XILINX SG.

© 2004 Xilinx, Inc. All Rights Reserved Implemented by : Alon Ben Shalom Yoni Landau Project supervised by: Mony Orbach High speed digital systems laboratory.

2. Requirements Existing Z-Dok interface 10G Ethernet – SFP+ Free chips? Fast Memory  More QDRII+ Large Memory for transient buffer  DDR? External Processor.

11/5/2015Mircea Bogdan1 Annie’s Central Card Status Report - 8/21/2015 The University of Chicago.

CMX status and plans Yuri Ermoline for the MSU group Level-1 Calorimeter Trigger Joint Meeting CERN, October 2012,

Status and planning of the CMX Wojtek Fedorko for the MSU group TDAQ Week, CERN April , 2012.

DAQMB Production Status S. Durkin The Ohio State University Florida EMU Meeting 2004.

T.Y. Ling EMU Meeting CERN, September 20, 2005 Status Summary Off-Chamber Electronics.

Stan Durkin EMU Meeting, Purdue Univ. Oct. 6, VCC Hardware Production Status Firmware compile issues delayed testing and burn-in. Last 15 boards.

US CMS DOE/NSF Review, May Cal. Trig. 4 Gbaud Copper Link Cards & Serial Link Test Card - U. Wisconsin Compact Mezzanine Cards for each Receiver.

KLM Trigger Status Barrel KLM RPC Front-End Brandon Kunkler, Gerard Visser Belle II Trigger and Data Acquistion Workshop January 17, 2012.

Towards a 7-module Micromegas Large TPC prototype 1 D. Attié, P. Baron, D. Calvet, P. Colas, C. Coquelet, E. Delagnes, M. Dixit, A. Le Coguie, R. Joannes,

DAQMB Status – Onward to Production! S. Durkin, J. Gu, B. Bylsma, J. Gilmore,T.Y. Ling DAQ Motherboard (DMB) Initiates FE digitization and readout Receives.

US Peripheral Crate VMEbus Controller Ben Bylsma EMU – ESR CERN, November 2003.

S. Durkin, CMS EMU Meeting U.C. Davis Feb. 25, DMB Production 8-layer PC Board, 2 Ball-Grid Array FPGA’s, 718 Components/Board 550 Production Boards.

D. Attié, P. Baron, D. Calvet, P. Colas, C. Coquelet, E. Delagnes, R. Joannes, A. Le Coguie, S. Lhenoret, I. Mandjavidze, M. Riallot, E. Zonca TPC Electronics:

KM3NeT Offshore Readout System On Chip A highly integrated system using FPGA COTS S. Anvar, H. Le Provost, F. Louis, B.Vallage – CEA Saclay IRFU – Amsterdam/NIKHEF,

ROD Activities at Dresden Andreas Glatte, Andreas Meyer, Andy Kielburg-Jeka, Arno Straessner LAr Electronics Upgrade Meeting – LAr Week September 2009.

Back-end Electronics Upgrade TileCal Meeting 23/10/2009.

October S T A N F O R D U N I V E R S I T Y A Quick Update for GENI Engineering Conference (GEC3) - Oct 30, 2008 John W. Lockwood and the NetFPGA.

E. Hazen1 New DCC Status and Plans Jim Rohlf, Eric Hazen, Arno Heister, Phil Lawson, Jason St John, Shouxiang Wu Boston University.

M. Bellato INFN Padova and U. Marconi INFN Bologna

The Jülich Digital Readout System for PANDA Developments

Status of the ECL DAQ subsystems

Novosibirsk, September, 2017

Initial check-out of Pulsar prototypes

CALICE DAQ Developments

Current DCC Design LED Board

Production Firmware - status Components TOTFED - status

Linux Field Programmable Gate Array OpenRISC Open System-On-A-Chip

Update on CSC Endcap Muon Port Card

CSC EMU Muon Port Card (MPC)

Large Area Endplate Prototype for the LC TPC

The Train Builder Data Acquisition System for the European-XFEL

University of California Los Angeles

The WaveDAQ System for the MEG II Upgrade

FrontEnd LInk eXchange

The University of Chicago

CCB to OH Tests at Rice M.Matveev Rice University May 12, 2016.

CMS EMU TRIGGER ELECTRONICS

MicroTCA Common Platform For CMS Working Group

TPC Large Prototype Toward 7 Micromegas modules

University of California Los Angeles

University of California Los Angeles

New Crate Controller Development

8-layer PC Board, 2 Ball-Grid Array FPGA’s, 718 Components/Board

Current Status of CSC Trigger Elements – Quick Summary

CSC Trigger Update Specific issues:

8-layer PC Board, 2 Ball-Grid Array FPGA’s, 718 Components/Board

John Lane Martin Postranecky, Matthew Warren

14BIT 125MHz ADC Board for JPARC-K Status Report Mircea Bogdan August 9, 2007 The University of Chicago.

TMB, RAT, and ALCT Status Report

AIDA: introduction Advanced Implantation Detector Array (AIDA)

A Quick Update for GENI Engineering Conference (GEC3) - Oct 30, 2008

JParc-K DAQ System Mircea Bogdan December 9-10, 2006.

Status of GbE Peripheral Crate Controller

University of California Los Angeles

The Trigger Control System of the CMS Level-1 Trigger

FED Design and EMU-to-DAQ Test

Presentation transcript:

2 Ball-Grid Array FPGA’s DMB Production Boards 20 production DMB’s produced and tested. 8-layer PC Board, 2 Ball-Grid Array FPGA’s 718 Components/Board Stan Durkin, USCMS-EMU Meeting, June 6, 2004

DMB Production Boards 17 Boards Passed All Tests 3 Dead Burr-Brown 16 bit ADCs Bad Chip Lot - Next 100 Released for Production Stan Durkin, USCMS-EMU Meeting, June 6, 2004

New Crate Controller Development A VMEbus Controller with Gigabit Ethernet A custom board designed and developed at OSU Based on XILINX Virtex-II Pro Custom firmware. Optical transceiver (for Gbit Ethernet) Communicates with stand-alone PC (in USC55) via Gigabit Ethernet Stan Durkin, USCMS-EMU Meeting, June 6, 2004

New Crate Controller Development Status Prototype board produced. Firmware has modular design. Each module full simulated. Gigabit Ethenet and VME firmware development in advanced stage. Gigabit communications tested Interfacing NASA VME 64 Core Stan Durkin, USCMS-EMU Meeting, June 6, 2004