Local Oscillator Generation - Internal. Uroš Mavrič Collaboration Meeting Warszawa, 15.12.2011

Introduction and Project Objectives. The goal is to generate a local oscillator module that will fit into a standard MTCA crate. This should reduce the number of cables and the needed space in the rack. All the frequencies should be locked to (derived from) the 1.3 GHz reference The LO signals should be phase noise-matched with the processing gain due to the vector sum. One module should feed the needed signals to a fully populated crate The module should generate: the LO frequency (1324, 1336 and 1354 MHz are possible, depends on the population of the boards and setting of the dividers) the ADC clock frequencies (81, 108 MHz are possible, depends on the setting of the dividers of the boards) the reference frequency

Project Description and Main Requirements. The module will be located in slot #12 as an RTM module The project was split into three modules: RF module (daughter board) : critical part in terms of RF quality Carrier board : data logging, uC, communication, control etc. AMC – uLOG board

Project History. The project started as a collaboration between I-Tech and DESY A feasibility study of various possible approaches (architectures) was carried out app. 1 year ago Several laboratory measurements were done using single/dual stage LO schemes, with various types of filters etc. It was decided for the present architecture because it proved to have the best performance. I-Tech did the design and implementation. The characterization of the board will be carried out by DESY. In November 2011 the gerber files were sent to production. The first boards are expected by the end of January 2012.

Critical Difficulties in the Project. Residual phase noise [10Hz-1MHz] 1.6 fs – Choice of the proper architecture Long term : 0.2 ps_pp, 0.2 %_pp [0.1-100 s] – Fitting the Peltier elements to the small form factor Filtering of the RF component (-80 dBc) – Choice of the proper filter technology High LO Output Power +27 dBm – Finding the proper output amplifier Meeting the specs inside the crate environment and radiation of the generated signal

To-do List. Define all the relevant tests and testing procedures to evaluate the board in January Perform the tests of the RF board If major problems occur, define the list of corrections of the second version of the RF board. Define the missing parameters of the carrier board (the system is not complete without the carrier board) Schedule Roughly for future boards: 4-5 weeks after the gerbers are sent the boards are in-house 1 week for testing (if the procedure is established) End of January + 2 weeks of testing + 7 weeks -> April (RF board) uLOG-Carrier + AMC-uLOG -> ?