Extraction of Doping Profile in Substrate of MNOS capacitor Using Fast Voltage Ramp Deep Depletion C-V method.

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Presentation transcript:

Extraction of Doping Profile in Substrate of MNOS capacitor Using Fast Voltage Ramp Deep Depletion C-V method

Abstract Two MNOS C-V profiling methods are presented; the conventional C-V profiling, and deep depletion (DD) C-V, the former shows a lack of information at the onset of inversion mode, while the latter can be achieved by the application of high speed voltage ramp of sweep rate equals 1MV/sec on the MNOS gate, meanwhile monitoring the current response of the time varying voltage, the entire DD C-V curve is traced on CRO screen with suitable DC voltage bias. The results show that doping profile can be extended 1  m deeper inside the silicon, i. e. ten times of Debye's length, hence more accurate results can be achieved. Interface states densities have small effect on final doping profile, and doping reaches approximately a constant value deep inside the silicon compatible with experimental part.

Introduction: Metal-Nitride-Oxide-Semiconductor (MNOS) capacitor is the essential part in non-volatile memory, it is also used as a passive coating due to its high resistivity, and higher dielectric constant compared to silicon dioxide [1, 2]. The calculation of doping profile is important to understand the characteristics of shrunken device, such as the device conductivity which is very sensitive to doping variation near the silicon substrate [1, 3]. There are several methods to extract impurity distribution pattern, the simplest, and the non – destructive one is the Capacitance - Voltage (C-V) method [4]. Over the years many researches on C-V profiling has, in general, remained limited to MOS [5]. In this work we try, to examine the suitability of C-V technique to deduce doping distribution under the oxide of MNOS structure, and to obtain deep depletion C-V curve in such devices in order to extend the profile deep inside the silicon substrate

Fig(1): (a) ideal MNOS structure, (b) ideal HF, LF, and deep depletion (DD) C-V curves. Ssssi SiO 2 Al Si 3 N 4 a voltage Non equilibrium deep depletion (DD) C-V High frequency (HF) C-V Low frequency (LF) C-V C acc =C N C min =C inv C inv =C N capacitance depletion inversion accumulation b Si

Fig(2): C-V curve of MNOS sample under the application of voltage ramp of sweep rate (3V/Sec) from accumulation (-ve voltages) to deep inversion (+ve voltages), and then in the reverse direction

Fig(3): Three C-V curves at 10 KHz, 100KHz, and 1MHz. The sweep rate is the same (3V/sec)

Fig(4): Three MNOS C-V curves 10 KHz, 1MHz, and DD, the sweep rate for the first two curves is the same (3V/sec), while for DD curve it is 1MV/sec.

MATLAB Algorithm flow chart Input C-V curves Calculate C d from eqn. (6) END Differentiate 1/(C m ) 2 with respect to voltage Calculate carrier concentration p(x) from eqn. (10), and depletion width from eqn. (7), then plot p(x) as a function of x Make the interface states correction p'(x) from eqn.(11), and plot the result as a function of x Calculate Na(x) from eqn. (17), and then plot the result as a function of x

Fig (5): hole profile using (1MHz) equilibrium and deep depletion (DD) method calculated from equation (10)

Fig(6): Hole profile p(x) and interface states corrected hole profile p'(x) which is calculated from equation (11).

Fig(7). Hole profile p(x) and doping profile Na(x), which is calculated from equation (17)

Conclusions C-V technique gives suitable information about impurity charge distribution near the surface of silicon substrate of MNOS device A deep depletion DD MNOS C-V curve was obtained by the application of high speed voltage ramp of sweep rate of (10 6 V/sec), and the current response of such voltage ramp is monitored. It was found that interface states densities have negligible effect on the calculation of doping profile. Doping profile decrease with going deep into the silicon bulk reaching approximately a constant value of 2*10 15 cm -3.

Refrences Abdulghefar K. Faiq, Extraction of Doping Profile in Substrate of MNOS capacitor Using Fast Voltage Ramp Deep Depletion C-V Method, Iraqi Journal of Applied Physics Vol. (6), No. (1), January 2010