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Lecture 16 ANNOUNCEMENTS OUTLINE MOS capacitor (cont’d)

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Presentation on theme: "Lecture 16 ANNOUNCEMENTS OUTLINE MOS capacitor (cont’d)"— Presentation transcript:

1 Lecture 16 ANNOUNCEMENTS OUTLINE MOS capacitor (cont’d)
Wed. discussion section (Eudean Sun) moved to 2-3PM in 293 Cory HW#9 is posted online. OUTLINE MOS capacitor (cont’d) Effect of channel-to-body bias Small-signal capacitance PMOS capacitor NMOSFET in ON state Derivation of I-V characteristics Regions of operation Reading: Chapter 6.2.2

2 VGB = VTH (Threshold) VTH is defined to be the gate voltage at which the inversion-layer carrier concentration is equal to the channel dopant concentration. For an NMOS device, n = NA at the surface (x=0) when VGB = VTH: The semiconductor potential is The potential in the body (“bulk”) is At VGB = VTH, the potential at the surface is The total potential dropped in the semiconductor is 2fB The depletion width is Xd -tox -tox Xd

3 Effect of Channel-to-Body Bias
When a MOS device is biased in the inversion region of operation, a PN junction exists between the channel and the body. Since the inversion layer of a MOSFET is electrically connected to the source, a voltage can be applied to the channel. VG ≥ VTH If the source/channel of an NMOS device is biased at a higher potential (VC) than the body potential (VB), the channel-to-body PN junction is reverse biased. The potential drop across the depletion region is increased. The depletion width is increased: The depletion charge density (Qdep= qNAXd) is increased. The inversion-layer charge density is decreased, i.e. VTH is increased.

4 Small-Signal Capacitance
The MOS capacitor is a non-linear capacitor: If an incremental (small-signal) voltage dVG is applied in addition to a bias voltage VG, the total charge on the gate is Thus, the incremental gate charge (dQG) resulting from the incremental gate voltage (dVG) is CG is the small-signal gate capacitance: constant charge

5 (N)MOS C-V Curve The MOS C-V curve is obtained by taking the slope of the Q-V curve. CG = Cox in the accumulation and inversion regions of operation. CG is smaller, and is a non-linear function of VGB in the depletion region of operation.

6 MOS Small-Signal Capacitance Model
Accumulation Depletion Inversion The incremental charge is located at the semiconductor surface The incremental charge is located at the bottom edge of the depletion region The incremental charge is located at the semiconductor surface

7 MOS Capacitive Voltage Divider
In the depletion (sub-threshold) region of operation, an incremental change in the gate voltage (DVGB) results in an incremental change in the channel potential (DVCB) that is smaller than DVGB: How can we maximize DVCB/DVGB ?

8 PMOS Capacitor The PMOS structure can also be considered as a parallel-plate capacitor, but with the top plate being the negative plate, the gate insulator being the dielectric, and the n-type semiconductor substrate being the positive plate. The positive charges in the semiconductor (for VGB < VFB) are comprised of holes and/or donor ions. Inversion VGB < VTH Depletion VTH <VGB < VFB Accumulation VGB > VFB -tox -tox -tox Xd,max Xd

9 PMOS Q-V , C-V inversion depletion accumulation accumulation depletion

10 MOSFET in ON State (VGS > VTH)
The channel charge density is equal to the gate capacitance times the gate voltage in excess of the threshold voltage. Areal inversion charge density [C/cm2]: Note that the reference voltage is the source voltage. In this case, VTH is defined as the value of VGS at which the channel surface is strongly inverted (i.e. n = NA at x=0, for an NMOSFET).

11 MOSFET as Voltage-Controlled Resistor
For small VDS, the MOSFET can be viewed as a resistor, with the channel resistance depending on the gate voltage. Note that

12 MOSFET Channel Potential Variation
If the drain is biased at a higher potential than the source, the channel potential increases from the source to the drain. The potential difference between the gate and channel decreases from the source to drain.

13 Charge Density along the Channel
The channel potential varies with position along the channel: The current flowing in the channel is The carrier drift velocity at position y is where mn is the electron field-effect mobility

14 Drain Current, ID (for VDS<VGS-VTH)
Integrating from source to drain:

15 ID-VDS Characteristic
For a fixed value of VGS, ID is a parabolic function of VDS. ID reaches a maximum value at VDS = VGS- VTH.

16 Inversion-Layer Pinch-Off (VDS>VGS-VTH)
When VDS = VGS-VTH, Qinv = 0 at the drain end of the channel.  The channel is “pinched-off”. As VDS increases above VGS-VTH, the pinch-off point (where Qinv = 0) moves toward the source. Note that the channel potential VC is always equal to VGS-VTH at the pinch-off point. The maximum voltage that can be applied across the inversion-layer channel (from source to drain) is VGS-VTH. The drain current “saturates” at a maximum value.

17 Current Flow in Pinch-Off Region
Under the influence of the lateral electric field, carriers drift from the source (through the inversion-layer channel) toward the drain. A large lateral electric field exists in the pinch-off region: Once carriers reach the pinch-off point, they are swept into the drain by the electric field.

18 Drain Current Saturation (Long-Channel MOSFET)
For VDS > VGS-VTH:

19 MOSFET Regions of Operation
When the potential difference between the gate and drain is greater than VTH, the MOSFET is operating in the triode region. When the potential difference between the gate and drain is equal to or less than VTH, the MOSFET is operating in the saturation region.

20 Triode or Saturation? In DC circuit analysis, when the MOSFET region of operation is not known, an intelligent guess should be made; then the resulting answer should be checked against the assumption. Example: Given mnCox = 100 mA/V2, VTH = 0.4V. If VG increases by 10mV, what is the change in VD?


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