GaN Systems Confidential State of the art GaN switches and their relevance to SMART DC in the UK Geoff Haynes Managing Director GaN Systems Ltd Vice President and Founder, GaN Systems Inc. 1 November 2012 John and Girvan Intro – 1 minute each GaN Systems Confidential

and 4 years of development GaN Systems - History 2012 First devices run on RFMD foundry 2011 Series A round 2010 First GaN Systems devices run at NRC A 14 year heritage 2008 GaN Systems founded 1999 First GaN transistors at Nortel and 4 years of development 1998 NRC start GaN process development We spent many years extoling the virtues of gallium nitride, and our unique solution, but it was only 8 months ago, when Chrysalix lead our first financing that things started to really move. They believed, like we did, that gallium nitrde, after many false dawns, was really coming, and they understood that we might have a technology that makes us able to compete and win! So lets talk abut what makes GaN Systems different

MOSFET / SiC FET / GaN Comparison Type Breakdown Voltage (V) Current (A) Resistance (mohms) Current/Area (A/mm2) FOM Ron*Qg SJ MOSFET (Infineon) 900 20 190 0.8 25 SiC FET (Cree) 1200 10 160 1.1 8 GaN (GaN Systems) 30 150 6.0 4.5 GaN Systems Confidential

Why is gallium nitride so special? GaN has as a material has some remarkable properties – temp voltage and current – but it’s very much a question of be careful what you ask for - its very characteristics create challenges that we have taken three years to overcome. Why is gallium nitride so special? 4 4

GaN Systems Innovation Reducing the size of GaN on Si devices by 4x Same Gate Width for ¼ the area, leads to 4x the devices for a wafer, and hence ¼ cost No additional production or materials costs – done on standard RF process, as (soon to be) evidenced by RFMD Solid IP– currently have US and International filings and we will continue to protect this. So what’s this mean in practice?? The island structure is the core GaN Systems IP GaN Systems Confidential

GaN Systems Innovation The island layout does more than simply reduce size, it addresses the technical barriers to adoption Addressing Barriers to Adoption Thermal management Minimal electromigration Near-zero debiasing Robustness – no bonds or airbridges Low inductance interconnect Cost Advantage Smallest device area = cost Scalability Available processes Its one thing to build a simple finger GaN device such as we’ve seen – quite another to build one that will meet the needs of serious industrial customers 3) Our island topology removes the barriers to adoption of GaN 4) Emphasise RFMD as available process and partner

High power package development High voltage High temperature High reliability Optimised interconnect Increased functionality We’ve got a long way to go. In many ways we’ve done the easy part and developed the technology. Now we need to turn that into product and $’s. I don’t need ot tell you how challenging that will be, but we are focused on the task, and have a strong, aligned board We need to execute flawlessly, not just in productization, by marketing, outreach, sales and building the partnerships that will allow us to grow and capture more value from our solutions

Design progress since the SMART DC report GaN Systems device design optimised New GaN 5 process developed at GaN on SiC foundry Gate leakage reduced to between 2 and 5 μA per m.m. Device re-designed to provide 3x improvement in Cgd Repeatability of breakdown voltages addressed But just as market – driven in part by Cleantech, is demanding greater efficiency, smaller size and inevitably lower cost – Silicon has reached limits of temp voltage current and switching speed Compound semis – III-V materials – offer the answer - but cost and barriers to adoption have constrained market acceptance. Gan has come of age. During our development work we have been counting on parallel evolution of the supply chain and this has happened. We have solid wafer sources and commoditization is starting. When we started this we were missionaries – now everyone in power electronics is aware of GaNs potential. Two things happened to catalyse and illustrate this – IR’s white paper and Transphorm’s funding Segue to 6 – Lets look at why our innovations are going to win – how are innovations harness the remarkable properties of GaN and break down the barriers to adoption - -- -

Packaging challenges resolved Copper Source post Drain through wafer via Connects to backside pad metalisation Castellation Cu posts 2mm x 2mm, 30A, 650V die

GaN die mounts directly on CMOS driver

Normally-off 600V switching action

Operation to 2000V plus

30 Amp Isat Vgs 2nd process shuttle run drain characteristics look similar to those of the 1st run. Device Lg was increased from 0.6mm to 1.0mm. On resistance measured to be ~140mW. Idsat measured to be ~33 amps. LCD structure entitled to 35 amps.

Next steps: Optimising designs for GaN on Si processes GaN on SiC Concentric Layouts Optimum use: Low voltage Low On-Resistance Small structures Castellated Layouts Optimum use: High voltage High current Larger structures Switching Figure of Merit – Si vs. SiC vs. GaN Patent pending Patent pending

UK collaborative demonstrator projects 600W mains to 48V down converter Target maximum power efficiency Optimise design to benefit from GaN characteristics Investigate bridgeless or two phase interleaved active PFC Phase shifted full bridge for high voltage isolated DC/DC 95 to 97% efficiency per stage to halve typical loss – --Challenging!

Load programmable DC supply socket Future demonstrator themes Load programmable DC supply socket DC to DC converter programmed and switched by load 48V Bus or include local down-conversion from AC mains 18V 12V 5V

Matrix converter for AC switching Bidirectional AC to DC conversion More possibilities Matrix converter for AC switching Bidirectional AC to DC conversion Solid state relay Offline LED lighting

Can GaN devices be competitive? UK estimated manuf. cost of 6” GaN on Si wafer by 2017 $500 -Based on 30,000 wafers Conservatively 2000 good die per wafer at 30 Amps Isat. Yields 10 cents per untested, unpackaged die Packaging and test requirements will dominate!!

UK manufacturing value chain GaN epitaxial growth IQE, Plessey NXP, Semefab, Plessey, IR Wafer fabrication Wafer services Eltek, Micross Module manufacture Semelab Linwave Package & Test Auto. Industrial Telecom Consumer Military & Aero.

Cool Switching™ from GaN Systems Contacts John Roberts – jroberts@gansystems.com Girvan Patterson - girvan@gansystems.com Geoff Haynes – ghaynes@gansystems.com (+44 7768 316704) GaN Systems Inc. 300 March Road #501, Ottawa, Ontario, K2K 2E2 20 20