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04/09/02EECS 3121 Lecture 25: Interconnect Modeling EECS 312 Reading: 8.3 (text), 4.3.2, 4.4.1-4.4.4 (2 nd edition)

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Presentation on theme: "04/09/02EECS 3121 Lecture 25: Interconnect Modeling EECS 312 Reading: 8.3 (text), 4.3.2, 4.4.1-4.4.4 (2 nd edition)"— Presentation transcript:

1 04/09/02EECS 3121 Lecture 25: Interconnect Modeling EECS 312 Reading: 8.3 (text), 4.3.2, 4.4.1-4.4.4 (2 nd edition)

2 04/09/02EECS 3122 Last Time Simultaneous switching noise is a key problem for off-chip drivers –Drive them as slowly as allowed General interconnect characteristics –Local wires and global wires –Many metal levels, connect with vias Capacitance is the primary parasitic –Area, fringing, interwire components –Interwire dominates today –Both simple and complex models exist to compute capacitance as a function of wire geometry

3 04/09/02EECS 3123 Lecture Overview Interconnect resistance IR drop/Electromigration RC delay models

4 04/09/02EECS 3124 Resistance & Sheet Resistance Resistance seen by current going from left to right is same in each block W L T R =  T W L Sheet Resistance R R 1 R 2

5 04/09/02EECS 3125 Bulk Resistivity Aluminum was dominant until ~2000 Copper has gradually taken over in the past 4-5 years Copper is pretty much as good as it gets

6 04/09/02EECS 3126 Interconnect Resistance Resistance scales poorly – Full scaling calls for reduction in width and thickness by S each generation R ~ S 2 for a fixed line length and material! Called reverse scaling  wires get slower when smaller while devices get faster

7 04/09/02EECS 3127 Polycide Gate Mosfet

8 04/09/02EECS 3128 Impact of New Materials IBM back-end copper process at left Yields 12% improvement over an aluminum process in a PowerPC design Transistor

9 04/09/02EECS 3129 RI Introduced Noise

10 04/09/02EECS 31210 Power and Ground Distribution

11 04/09/02EECS 31211 IR Drop in a High-Speed Design

12 04/09/02EECS 31212 Electromigration Migration of metal atoms in conductors which pass large DC current densities Large current densities lead to fast moving eletrons that can rip metal atoms off their sites This leads to open circuits and short circuits between adjacent wires MTTF: mean time to failure How long can we pass a constant current through a wire before it fails? Exponentially dependent on temperature and material type (ex: Al vs. Cu) Linear to quadratic dependence on current density

13 04/09/02EECS 31213 Electromigration Results Limits DC current densities to ~ 10 6 A/cm 2 In a 1  m x 1  m wire  10mA

14 04/09/02EECS 31214 Evolution of Interconnect Modeling Before 1990, wires were thick and wide while devices were big and slow –Large wiring capacitances and device resistances –Wiring resistance was << device resistance –Model wires as capacitances only In the 1990s, scaling theory led to smaller and faster devices and smaller, more resistive wires –Reverse Scaling properties of wires! –RC models became necessary In the 2000s, frequencies are high enough so that inductance is a major component of total impedance

15 04/09/02EECS 31215 Global interconnect delay grows

16 04/09/02EECS 31216 Lumped RC model of a wire

17 04/09/02EECS 31217 RC Delay

18 04/09/02EECS 31218 RC Models

19 04/09/02EECS 31219 RC Propagating Wavefront Step response of a distributed RC wire as a function of location along wire and time

20 04/09/02EECS 31220 Delay expressions We will typically have a load capacitance C L at node V out Assumes step input Vin

21 04/09/02EECS 31221 Summary/Key Points Wire resistivity gets worse as wires get smaller (reverse scaling, different than device delay) Power distribution becomes more difficult due to IR drops and higher current densities Lumped wire delay overestimates actual delay (distributed) –Because the entire capacitance is NOT charged through the full wire resistance Wire RC delay increases quadratically with line length as both R and C rise linearly –This has implications on how to reduce RC delay

22 04/09/02EECS 31222 How to reduce RC delay Since RC delay is quadratic with length, reducing length is key Note: 2 2 = 4 and 1+1 = 2 but 1 2 + 1 2 = 2 sourcesink source sink L = 2 units

23 04/09/02EECS 31223 Repeaters Repeater

24 04/09/02EECS 31224 Repeaters Impact Repeaters are simply large inverters inserted along a global interconnect to reduce the RC delay

25 04/09/02EECS 31225 The Elmore Delay

26 04/09/02EECS 31226 Penfield-Rubinstein-Horowitz

27 04/09/02EECS 31227 Capacitive Crosstalk Noise Crosstalk noise high-level description Simple lumped model, step through it slowly Give results

28 04/09/02EECS 31228 Cross-sectional view

29 04/09/02EECS 31229 High level view of crosstalk noise

30 04/09/02EECS 31230 Noise Pulses can be large

31 04/09/02EECS 31231 Simple Noise Model (Rubio) Model derivation: no line resistance considered, Tr is rise time of aggressor signal, R is the effective driver resistance of the victim (good approx, demonstrate using I-V curves)

32 04/09/02EECS 31232 Linear Resistance Assumption Slope here is fairly constant with Vgs=Vdd (operating point for NMOS holding output to GND) Inverse of this slope ~ Reff Replace the victim driver by a linear resistor Only problem – if noise gets too big, the approximation becomes worse (R grows)

33 04/09/02EECS 31233 How to Battle Capacitive Crosstalk Unrealistic – need tight packing to reduce chip area, cost


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