Upgrade with Silicon Vertex Tracker Rachid Nouicer Brookhaven National Laboratory (BNL) For the PHENIX Collaboration Stripixel VTX Review October 1, 2008.

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Upgrade with Silicon Vertex Tracker Rachid Nouicer Brookhaven National Laboratory (BNL) For the PHENIX Collaboration Stripixel VTX Review October 1, 2008 Performance Results of the PHENIX Silicon Stripixel Detector

Outline 2 Performance Results of Silicon Module Using ROC-3: – Pedestal Distributions – Source Tests ( 90 Sr) – Cosmic-ray Tests – Proton Beam Tests – Summary Performance Results of Silicon Module Using ROC-3prime: – Pedestal Distributions – Summary

3 Silicon Modules Using ROC-3 We built 3 silicon modules with: - analog power plan continuous - thickness of each power and ground layers is 35  m BNL: assembly and testing sulation FNAL: wire-bonding of sensor to ROC and encapsulation SVX4 chips sensor Readout: Readout: DAQ FEM board FPGA board Silicon Module Picture of Silicon Module

Module #3 4 Silicon Modules Using ROC-3: Pedestal Distributions Module #2 Module #1 ADC Number of Channels # Shown in June review: - Modules #1 and #2 Assembled after June review: - Module #3

6/7/ Pedestal Distribution for all SVX4 Chips RMS (noise) for chips is ~ 10 ADC channels ( online plot: projection on ADC axis ) Module #2 chip #1 chip #2 chip #3chip #4 chip #8 chip #7chip #6 chip #5 chip #9 chip #10chip #11 chip #12

6/7/ Offline Analysis (can be implemented in FPGA) Step 1: mask hot/bad channels from pedestal data Step 2: remove junk events (e.g. pre-amp reset) Step 3: event-by-event pedestal correction for every channel - For a given chip, event-by-event: we determine the average-channels pedestal and apply truncation Step 4: select good events

MPV ~ 91.2 Using Single Module with ROC-3 Using Single Module with ROC-3 Using offline analysis Using offline analysis Ped  = 9.41 Performance Results: Beta Source ( 90 Sr) HV(V) Pedestal 1  MPV S/N For x channels For u channels HV(V) Pedestal 1  MPV S/N Excellent charge sharing 7 - Trigger timing was not well optimized (see beam test results, next).

8 cosmic ray ? Using Two Modules (telescope) Using Two Modules (telescope) Performance Results: Beta Source ( 90 Sr)

9 Top module is rotated so that the read-out region overlaps. Scintillators Sensors Bottom SensorTop Sensor Bottom SensorTop Sensor The tracks have been observed from cosmic-ray Performance Results: Cosmic-ray (two modules) 9

Performance Results: Proton Beam 120 GeV at FNAL (T984) 10 Beam Pixel layers Stripixel layers Silicon Module With ROC-3 3 Pixel layers 3 Stripixel layers Proton Beam Trigger scintillators Schematic of detector setup 3 Stripixel layers in the dark box

Proton Beam 120 GeV: Time Scan Relative timing between FEM clock and trigger. T5 gives the best timing and largest charge integration T0 T1 T2 T3T4 T5 T6 T7 11

12 a-pixel b-pixel Diffused charge cloud Spiral p+ electrode : Charge Asymmetry for 0 Degree From KEK test (Old sensor setup : 3 turns) From Beam Test (FNAL): (New sensor setup : 5 turns)

Event #7 Event #6 Front module (layer 1) Middle Module (layer 2) Back module (layer 3) Beam Events DisplaysEvents Displays Performance Results: Proton Beam 120 GeV 13

Event # 7 Front module (layer 1) Middle Module (layer 2) Back module (layer 3) Beam Red circle: 1) clusters formed event by event with ADC > 3  (1  ~ 10 ADC) 2) cluster is selected: if cluster ADC > 40 Tracking: Using Front and Back Modules Performance Results: Proton Beam 120 GeV 14

15 x channels Residual DistributionsResidual Distributions Performance Results: Proton Beam 120 GeV 15 Resolution: Resolution: for channels x: 0.44 (RMS) x 80  m (pixel size) = 35  m for channels u: 0.50 (RMS) x 80  m (pixel size) = 40  m Shape of the distribution is consequence of the three-plane-resolution with imperfect alignment Proton Beam layer 1 layer 2 layer 3 - layer 2 and 3 for tracking and layer 3 for expected. data u channels

Tracking efficiency: ADC Values on Expected Channels 16 Layer #All countCount in ADC < 40 Efficiency (%) ±0.18 Channels (x) Layer #2 By tracking (x) By tracking (u) Layer #All countCount in ADC < 40 Efficiency (%) ±0.27 Channels (u) Layer #2 16

Peak: Black : T4+T5+T6 : 95.5 Red : T5 : 98.6 Peak: Black : T4+T5+T6 : 94.7 Red : T5 : * stat. scaled to red.  = 9.6  = 10.1 Performance Results: Proton Beam 120 GeV Channels “Stripixel” Pedestal  MIP MPV (T4+T5+T6) S/N (T4+T5+T6) MIP MPV (T5) S/N (T5) x u

6/7/ Summary I Silicon Modules using ROC-3 were built: Silicon Modules using ROC-3 were built: - Pedestal distribution of the modules with ROC-3 is quite encouraging: pedestal distribution and sensitivity to digital activity are much improved. Good results from beta source, cosmic-ray and beam test (120 GeV proton at FNAL): - Good results from beta source, cosmic-ray and beam test (120 GeV proton at FNAL): - Hits successfully detected - Good correlation between X and U strips observed - Signal/Noise measured: MIP/Noise = Tracking efficiency: very good (more than 98%)

6/7/ Silicon Module Using ROC-3prime We built 3 silicon modules: We built 3 silicon modules: 2 modules: thickness power and ground layers 1/4 oz Cu 1 module: thickness power and ground layers 1/2 oz Cu Picture of Silicon Module: 1/4 oz Cu

6/7/ Silicon Module Using ROC-3prime We have good news, and a few design issues to solve: the We have good news, and a few design issues to solve: the ROC-3prime has been reviewed by Instrumentation Division at BNL ROC-3prime has been reviewed by Instrumentation Division at BNL and at FNAL (Si Department): and at FNAL (Si Department): 1) The good news: the Hughes Circuits (board fabricator) made very good boards of ROC-3prime (better than ROC-3): - revision of the board design allowed for improved bonding pads, SVX4 pads and sensor HV pad. - revised dimension and layout makes the assembly of the board much easier and more reproducible. Conclusion: the wire-bonding of the 12 SVX4 to ROC-3prime was easy to do (no difficulties) The assembly of silicon module with ROC-3prime is much easier than silicon module with ROC-3.

6/7/ Silicon Module Using ROC-3prime 2) Remaining design issues to be addressed in the next round of ROC prototyping such as: issue #1: solder on one bonding pad: only for few SVX4 chips Bad bonding pad Good bonding pad

6/7/ Silicon Module Using ROC-3prime issue #2: Misplaced solder on bonding pad Grounding pad on ROC-3prime (covered by nice big of solder) Sensor guardring pad

6/7/ Silicon Module Using ROC-3prime Fixed on existing board issues #1 and #2: design change in the next round of prototyping will remove this error. Issue #2 fixed: fixed by creating new bonding pad Note: under the solder drop, we observed the gold pad Issue #1 fixed: wire-bond to the via connected to the pad

6/7/ Silicon Module-ROC-3prime: Pedestal Distributions Module #1: ROC-3prime with only 12 SVX4s (No sensor) difficulties to wire-bond to via (Cu pad): one hybrid is missing

6/7/ Silicon Module-ROC-3prime: Pedestal Distributions Module #1: ROC-3prime with sensor wire-bonded to SVX4s Yes, pedestal distributions are flat in ROC-3prime (we are building more modules to confirm these results) This module has thickness 1/4 oz Cu

6/7/ Silicon Module-ROC-3prime: Pedestal Distributions Module #2: ROC-3prime with only 12 SVX4s (No sensor) Silicon module will be ready by the end of this week and test results by the end of next week. Silicon module will be ready by the end of this week and test results by the end of next week. ADC Channel #

6/7/ Summary II Results from silicon module #1 with ROC-3prime and thickness 1/4 oz Cu are very encouraging: Flat pedestal distributions. Significantly easier to assemble than ROC-3 Build more modules is required for confirmation (module #2 and #3 are in progress). Performance results from silicon modules using ROC-3 (source, cosmic-ray, beam) and results from ROC-3prime lead that we should produce the pre-production ROC as soon as possible. The pre-production ROC should use ROC-3prime as basic configuration. For pre-production ROC status: See Eric Mannel talk

6/7/ Auxiliary Slides