Dr. ClincyLecture Slide 1 CS Chapter 3 (3A and ) Part 8 of 8 Dr. Clincy Professor of CS

Dr. ClincyLecture2 T Flip Flop T Flip Flops are good for counters – changes its state every clock cycle, if the input, T, is 1 Positive-edge triggered flip flop Since the previous state of Q was 0, it complements it to 1

Dr. ClincyLecture3 Counters 3-stage or 3-bit counter constructed using T Flip Flops With T Flip Flips, when input T=1, the flip flop toggles – changes state for each successive clock pulse Initially all set to 0 When clock pulse, Q0=1, therefore Q’=0 disabling Q1 and Q1 disables Q2 (have 1,0,0) For the 2 nd clock pulse, Q0=0, therefore Q’=1, causing Q1=1 and therefore Q’=0 disabling Q2 (have 0,1,0) For the 3 rd clock pulse, Q0=1, therefore Q’=0 disabling Q2 and therefore disabling Q3 (have 1,1,0) Etc… Hmmm LSB Called a Ripple Counter

Dr. ClincyLecture4 Recall Current State or output of the device is affected by the previous states Circuit Flip Flops New Input Previous State or Output Current State or Output Previous State or Output Sequential Logic Circuit New Input Current State or Output Combinatorial or Combinational Logic Current State or output of the device is only affected by the current inputs Examples: Decoders Multiplexers Examples: Shift Registers Counters

Dr. ClincyLecture5 x0=z0=  x0=z0=  x0=z0=  x1=z0=  x1=z1=  x1=z0=  x1=z0=  x0=z1=  S2S3 State diagram of a mod-4 up/down counter that detects the count of 2. S1 S0 Sequential Circuit – State Diagram If x=0, count up, If x=1, count down Interested when 2 is realized – z=1 when reach 2, else z=0 If at 0 and x=0, count up to 1 (and z=0) If at 0 and x=1, count down to 3 (and z=0) State diagram describes the functional behavior without any reference to implementation

Dr. ClincyLecture6 x0=z0=  x0=z0=  x0=z0=  x1=z0=  x1=z1=  x1=z0=  x1=z0=  x0=z1=  S2S2 S3 State diagram of a mod-4 up/down counter that detects the count of 2. S1 S0S0 Sequential Circuit – State Table Can represent the info in the state diagram in a state table

Dr. ClincyLecture7 Sequential Circuit – Equation Inputs – y 2,y 1,x Outputs –Y 2, Y 1

Dr. ClincyLecture8 Sequential Circuit – Circuit Design D Flip Flops used to store values of the two state variables between clock pulses Output from Flip Flops is the present-state of the variables Input, D, of the Flip Flops is the next-state of the variables

Dr. ClincyLecture9 Finite State Machine Model The example we just implemented is an example of a “Finite State Machine” - is a model or abstraction of behavior composed of a finite number of states, transitions between those states, and actions Moore finite-state machine – each “state” is associated with an “output” Mealy finite-state machine – each “transition” is associated with an “output” Algorithmic State Machine (ASM) – can act as both a Moore and Mealy machine

Dr. ClincyLecture Slide 10 NOTE Your book doesn’t do a good job in showing you how to derive or design sequential circuits (using state and state assignment tables) – the lecture did so – your book gives various examples of sequential circuits (Moore and Mealy finite-state machines). Study Guide : For the exams on Monday and Wednesday, they will cover all of Chapter 3 except the section regarding transistors (pages ) and Convolutional Coding (pages ). Boolean algebra and circuits can be on both parts however, the closed book exam will focus more on Boolean algebra and the opened book exam will focus more on circuits

Dr. ClincyLecture Slide 11 Chapter 3 Review If any time remains, we can review any topic or concept for Chapter 3 that was covered in the lectures. Please keep your questions geared towards the concepts covered in Ch 3 and the lectures (in realizing some value-added for the up- and-coming exam) Exam 2 will consists of two parts: Part 1 on Monday and Part 3 on Wednesday. Part 1 will be closed book (can use calculator, can not use phone or laptop). Part 2 will be open book (can use calculator and book, can’t use phone or laptop). If you miss either part of the exam, it can not be made up.