Presentation is loading. Please wait.

Presentation is loading. Please wait.

MIPS Logic & Shift. Bitwise Logic Bitwise operations : logical operations applied to each bit Bitwise OR:

Similar presentations


Presentation on theme: "MIPS Logic & Shift. Bitwise Logic Bitwise operations : logical operations applied to each bit Bitwise OR:"— Presentation transcript:

1 MIPS Logic & Shift

2 Bitwise Logic Bitwise operations : logical operations applied to each bit Bitwise OR:

3 Immediate Value Immediate Value Value hard coded into instruction

4 Immediate Value Immediate Value Value hard coded into instruction 16 bits available to store immediate:

5 Register Registers = 32 bits, Immediate 16 bits Must extend immediate

6 Max Immediate Immediate value can't require 17+ bits Unless you use Pseudo instructions – Must be UNCHECKED for now

7 OR vs ORI OR $6, $5, $4 ORI $6, $0, 0xffff

8 Logical Ops to Know Immediate instructions ori, andi, xori instruction $dest, $source, immediate Register-Register Instructions or, and, xor, nor instruction $dest, $source1, $source2

9 Quick Reminders A or 0 = A – Anything or'd with 0 is that thing A and 1 = A – Anything and'd with 1 is that thing A and 0 = 0 – Anything and'd with 0 is 0 A xor 1 = not(A) – Xoring with 1 flips bit

10 Common Tricks ORI Load a value to register by ori $0 and value

11 Common Tricks OR Clear a register by oring $0 with self

12 Common Tricks OR Copy register by or with $0

13 Common Tricks OR Combine non-overlapping patterns:

14 Common Tricks AND Keep only specified bits by anding with 1's in desired digits

15 Common Tricks NOR Do NOT by NOR with $0

16 Logical Shift Logical Shifts – Add 0's to fill empty space sll, srl instructions: instruction $dest, $source, number of bits

17 NOP NOP : No operation – Done with sll $0, $0, $0 – Opcode for sll is 0 0x00000000 is nop!

18 Loading Large Value Loading 32bit immediate takes 3 steps: Load (ori) 16bits (in right part of register) Shift left 16 bits (move to left half of register) Load (ori) 16bits (in right part of register)

19 Bit Isolation Getting particular bits out of pattern Strategy 1: – Shift to wipe out others Want to clear left 8 bits: 1010 1011 1111 0110 1010 1011 1111 0110 Shift left 8 bits: 1111 0110 1010 1011 1111 0110 0000 0000 Shift back right 8 bits: 0000 0000 1111 0110 1010 1011 1111 0110

20 Bit Isolation Getting particular bits out of pattern Strategy 1: – Shift to wipe out others Now want to isolate green five bits 0000 0000 1111 0110 1010 1011 1111 0110 Shift right 19 0000 0000 0000 0000 0000 0000 0001 1110

21 Bit Isolation Getting particular bits out of pattern Strategy 2: – Masking : binary pattern showing bits to keep 0x00 : keep no bits 0x01 : keep bit 1 (0000 0001) 0x04 : keep bit 3 (0000 0100) 0x05 : keep bit 1 & 3 (0000 0101) 0xF0 : keep bit 5-8 (1111 0000)

22 Using Masks AND with a mask 0's out unmasked portions: 0000 1111Mask0011 0000 0101 1011Data0101 1011 0000 1011AND result0001 1011

23 Hex Mask F (1111) mask a whole hex digit 0x0000000fMask0xfff00000 0x12345678Data0x12345678 0x00000008AND result0x12300000

24 Bit Isolation Getting particular bits out of pattern Strategy 2: – Masking : binary pattern showing bits to keep Want to keep just green bits 1010 1011 1111 0110 1010 1011 1010 0110 Create mask… 0x01F0 0000 0000 0000 0000 0000 0001 1111 0000 AND 0000 0000 0000 0000 0000 0001 1010 0000

25 Bit Isolation Want to keep just green bits 1010 1011 1111 0110 1010 1011 1010 0110 Create mask… 0x01F0 0000 0000 0000 0000 0000 0001 1111 0000 AND 0000 0000 0000 0000 0000 0001 1010 0000


Download ppt "MIPS Logic & Shift. Bitwise Logic Bitwise operations : logical operations applied to each bit Bitwise OR:"

Similar presentations


Ads by Google