1. Total Dose Effects on Devices and Circuits - Principles and Limits of Ground Evaluation-

2. Total Dose Effects on Devices and Circuits 2 Outline n Sensitive structures and degradation processes n Rules for effective device selection n Limits of total dose evaluations

3. Total Dose Effects on Devices and Circuits 3 Problematic of total dose ground evaluation n Impossible to reproduce in-orbit device environment u radiative environment complexity u operating conditions(bias, temperature) n Necessary to understand the physics to establish rules to extrapolate from ground to space n Need of realistic data for non-hardened devices n Need of realistic data for non-hardened devices (COTS)

4. Total Dose Effects on Devices and Circuits 4 One answer: reasonable conservativity n Conservative conditions to assure that: u a satisfying behaviour during device evaluation implies u a satisfying in-orbit behaviour n “Reasonable” for “not too much” n These conditions must be defined regarding each experimental parameter modifying the device degradation u Irradiation nature u Dose rate/experiment duration u Device bias and temperature

5. Total Dose Effects on Devices and Circuits 5 Sensitive structures (Si technologies) nMOS transistor p-type Si substrate Gate oxide n+ Interface NPN bipolar transistor p-type base n-type collector Surface passivation oxide n+ emitter Interface

6. Total Dose Effects on Devices and Circuits 6 MOS structure degradation mechanism Gate (Vg) Oxide Interface Silicon E Energy + + - +- + + ++ + + + + + ----- -

7. Total Dose Effects on Devices and Circuits 7 DrainSource Ideal nMOS transistor Gate oxide p-type Si substrate Gate (Vgs) Vth

8. Total Dose Effects on Devices and Circuits 8 Ideal nMOS transistor: total dose D - Oxide trapped charge-induced degradation - DrainSource +++ + + ++ + ----- ++ + + +++ + + + + + Gate (Vgs) With , fractional yield

9. Total Dose Effects on Devices and Circuits 9 Fractional yield dependencies Worst case regarding two parameters: 1- Nature of ionising source: Electrons or Co60 2- Electric field in sensitive oxide: Maximum value After Ma T.P., Dressendorfer P.V. (1983)

10. Total Dose Effects on Devices and Circuits 10 Ideal nMOS transistor: stable state - Effect of oxide trapped charge annealing - - Theoretical condition: infinite post irradiation time - Practical conditions: 168 hours at 100°C is a compromise for large oxide charge annealing and slight interface traps annealing DrainSource ----- Gate (Vgs) --

11. Total Dose Effects on Devices and Circuits 11 End of ground irradiation state Interface states growth nMOS ideal case: time-dependant effect (TDE) 0 Parameter variation t ir t pi -Q ot -Q it  V th Possible in-orbit states Stable state

12. Total Dose Effects on Devices and Circuits 12 Selection of MOS circuits Parameter value D t pi x xx x x x : Specified limits x : Measured values A device is selected if all the measurements are in the specified domain PASS

13. Total Dose Effects on Devices and Circuits 13 Selection of MOS circuits Parameter value D t pi x x x xx x : Specified limits x : Measured values Failure due to oxide trapped charge FAIL

14. Total Dose Effects on Devices and Circuits 14 Selection of MOS circuits Parameter value D t pi xx x x xx : Specified limits x : Measured values Failure due to interface traps FAIL

15. Total Dose Effects on Devices and Circuits 15 Ideal nMOS sensitive parameters (1) Device level Threshold voltage (~ linear) Drive current Carrier mobility (second order) Circuit level Logic levels Propagation delays High speed performances

16. Total Dose Effects on Devices and Circuits 16 Ideal nMOS sensitive parameters (2) Device level Leakage current (superlinear) Circuit level Supply current (superlinear) Design-dependant parametric degradation Leakage current

17. Total Dose Effects on Devices and Circuits 17 Bipolar transistors degradation (1) + + ++ - ---- - Base Emitter Surface passivation oxide + ++ ++ + + + Recombination rate in the emitter-base junction is modified: 1- In Si: surface potential shift induces change in the carrier densities 2- At the SiO2/Si interface: by the interface traps density increase and change in carrier densities The global resulting degradation strongly depends the transistor structure (design and type) and of the experimental conditions

18. Total Dose Effects on Devices and Circuits 18 Bipolar transistors degradation (2) The recombination fraction of the base- emitter current do not participate to the current amplification: - The current gain (I C /I B ) decreases - The current gain degradation depends on V BE (non-linear effect) - Device level: Gain degradation has important impact in linear circuits - Circuit level: Leakage currents are induced in all circuit types

19. Total Dose Effects on Devices and Circuits 19 Enhanced Low Dose Rate Sensitivity (ELDRS) - True dose rate effect - * Specific to bipolar technologies * Fractional yield dependence to dose rate (# from TDE) * No satisfying experimental method to bound its magnitude After Johnston et al. IEEE TNS (1994)

20. Total Dose Effects on Devices and Circuits 20 Selection of bipolar devices t pi x A device is selected if all the measurements are in the specified domain Design margins are recommended High dose rate at room temperature prohibited D : Specified limits x : Measured values Parameter value x xx x x PASS No signification: May be omitted

21. Total Dose Effects on Devices and Circuits 21 Main I.C. degradation mechanism - Leakage currents in isolating structures - Z X Drain Gate Source Calculated current density at the silicon surface X Z DrainSourceGate

22. Total Dose Effects on Devices and Circuits 22 Standards for ground evaluation: Irradiation conditions - Worst-case conditions to test oxide charge-related failures - Higher fractional yield Compromise between: - benefit of TDE (annealing during irradiation) - cost of time consuming experiments -Maximum electric field in sensitive zones (fractional yield) -Avoid chip heating (thermal annealing)

23. Total Dose Effects on Devices and Circuits 23 Standards for ground evaluation: Post-irradiation conditions - Worst-case conditions to test interface traps-related failures - SCC: time for Nit to reach maximum MIL: time less then irradiation time to anneal in the intended use MIL: +50% of design margin (compensates possible Nit annealing) One bias board only Something simple !

24. Total Dose Effects on Devices and Circuits 24 Displacements/ionisation cumulative effect - Dark current in Active Pixel Sensor - Protons create ionisation (in SiO2) and displacements (in Si) Both interaction type can induce dark current 10 10 protons/cm²

25. Total Dose Effects on Devices and Circuits 25 Displacements/ionisation combined effects: Bipolar circuits A really extreme example of proton-induced failure, but - a smaller effect can reduce bipolar technologies hardness, - RH means “PTDH” (Pure Total Dose Hard) After Rax et al. IEEE TNS (1998)

26. Total Dose Effects on Devices and Circuits 26 Summary n Ground evaluation of total dose effects are well defined and can assure devices hardness for most of u device technologies u device types u mission profiles n Some specific devices or applications need particular attention n Necessary to study effect of device scaling