Presentation on theme: "MICROWAVE FET Microwave FET : operates in the microwave frequencies"— Presentation transcript:
1MICROWAVE FET Microwave FET : operates in the microwave frequencies unipolar transistorscurrent flow is carried out by majority carriers aloneIt’s a voltage controlled devicevoltage at the gate terminal controls the current flow.
2Advantages of FET’s compared to BJT It has voltage gain in addition to current gainEfficiency is higherNoise figure is lowInput resistance is very high, upto megaohms.Operating frequency is upto X band/
4N-channel JFET:N-type material is sandwiched between 2 highly doped of p-type material (p+ regions)If the middle part is a p-type semiconductor, then its p-channel JFET.2 p-type regions in the n channel JFET – GatesEach end on n-channel is joined by a metallic contact.Source : Contact which supplies source of the flowing electronsDrain :Contact which drains electrons out of the materialId : flows from drain to the deviceFor p-channel JFET, polarities of Vg & Vd are interchanged.Electrons have higher mobilityn-channel JFET provides higher conductivity.Higher speed
5Operation Under normal conditions, Vg = zero, Id = zero. Channel between gate junctions is entirely open.When Vd is appliedn-type semiconductor bar acts as resistorcurrent Id increases linearly with VgFor p-channel JFET, polarities of Vg & Vd are interchanged.As Vd is further increasedmajority of free electrons get depleted from the channel.Space chare extends into the channel.space charge regions expand & join together.All the free electrons are completely depleted in the joined region -> PINCH OFFIf Vg is applied : pinch off voltage reduces
7Pinch off VoltageIt is the gate reverse voltage that removes all the free charges from the channel.Poisson’s equation for the voltage in n-channel
8Integrating the above equation and applying boundary condition ie Integrating the above equation and applying boundary condition ie. E=0 at y=a yieldIntegrating once again and applying boundary condition V=0 at y=0 yield
9(a : the height of the channel in metres) Pinch off voltage under saturation condition is
15BREAKDOWN REGIONAs Vd increases for a constant Vg, the bias voltage causes avalanche breakdown across the junction.Drain current Id increases sharply.The breakdown voltage is
16MOSFETs- Metal Oxide Semiconductor Field Effect Transistors 4 terminal – Source, Gate, Drain and SubstrateSimple structure and economicTypesNMOSPMOSCMOSCurrent is controlled by electric field :Junction Field Effect Transistors
18N-CHANNEL MOSFETP-type substrate2 highly doped n regions diffused – source & drain separated by 0.5umThin layer of silicon dioxide grown over the surface.Metal contact on the insulator – acts as gate.
19Electronic Mechanism No gate voltage applied connection b/w source & drain : 2 back to back pn junctionsReverse leakage current b/w Drain and SourceGate voltage is +ve w.r.t. Source.Positive charge deposition on the gate metalNegative charges are induced in the p-substrate at the semiconductor-insulator interfaceFormation of channel conduction of IdThreshold Voltage : Minimum gate voltage for channel formation
20Modes of Operation Enhancement Mode Normally off mode Gate voltage = 0 VVery low Channel conductanceConsidered as the OFF statePositive gate voltage to turn on the deviceChannel length is “Enhanced”Application :As Linear Power Amplifiers
21Depletion Mode Normally ON mode A channel is present even at zero bias To turn off the device Negative gate voltage“Depletion” of charge carriers by the application of negative gate voltage