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ITRS may in the future provide Research Guidance by defining better Innovation Questions for R&D ITRS Maastricht 04/07/06.

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Presentation on theme: "ITRS may in the future provide Research Guidance by defining better Innovation Questions for R&D ITRS Maastricht 04/07/06."— Presentation transcript:

1 ITRS may in the future provide Research Guidance by defining better Innovation Questions for R&D ITRS Maastricht 04/07/06

2 2 Source: Siemens The engine of our industry : The exceptional shrinking price of microelectronics products Price of 1 Megabit of Si Memory euros euros 400 euros 120 euros 30 euros 5 euros 0,5 euro 0,05 euro ,01 euro 2003 Post-it Thanks to « classical scaling » No need for economics : the smaller, the better

3 3 Gordon Moore, 1965 Reduced cost is one of the big attractions of integrated electronics, and the cost advantage continues to increase as the technology evolves toward the production of larger and larger circuit functions on a single semiconductor substrate.Reduced cost is one of the big attractions of integrated electronics, and the cost advantage continues to increase as the technology evolves toward the production of larger and larger circuit functions on a single semiconductor substrate. Electronics, Volume 38, Number 8, April 19, 1965

4 4 Simplified Transistor Roadmap 65nm45nm32nm22nm PDSOI FDSOI 2015 bulk stressors + substrate engineering + high µ materials MuGFET MuCFET electrostatic control SiON poly high k metal gate stack planar3D Source: European Nanoelectronics Initiative Advisory Council (ENIAC)

5 5 Food for thought Moores Law and its continuance is an economic rather than a technical statement (Bernard Meyerson, chief technologist for IBMs Systems & Technology Group). Clock frequency is not the driver of system performance. You can get a better result by making tradeoffs to balance numerous aspects of performance (Bernard Meyerson) Classical Scaling -- the glue that connected Moores Law to performance – replaced by equivalent scaling.

6 6 Pursuing the race for added value for the end customer Combining on chip ULSI and out of the chip integration More than Moore: Diversification More Moore: Miniaturization Combining SoC and SiP: Higher Value Systems Baseline CMOS: CPU, Memory, Logic Biochips Sensors Actuators HV Power Analog/RFPassives 130nm 90nm 65nm 45nm 32nm 22nm. V Information Processing Digital content System-on-chip (SoC) Interacting with people and environment Non-digital content System-in-package (SiP) Beyond CMOS 2005 edition

7 7 The blurring nature of products What is it ? A phone ? A camera ? A PDA ? What makes its value ?

8 8 From R&D to R-I-D (Hatchuel & Weil) R&D R : Answering the questions asked Good if able to solve the issues it was requested to solve D : Fine tuning the process / product Who asks the right questions ? In a stable environment, no need to look for new questions R-I-D In a changing environment : need for I function I for Innovation Defining the questions to be solved by the R

9 9 What does it mean for ITRS ? ITRS goal Provide research guidance for the industry In the past Smaller was better, and cheaper We didnt need an explicit economic model to tell us which research was useful No need for I ITRS role : identify the red brick walls Today System performance no longer purely commanded by device performance More Moore and More than Moore What will bring more value to the end user ? Need for I Natural role of ITRS : Defining the questions to be solved by the R

10 10 How to achieve that ? Proposed Approach: assessment of the potential value return from research topics Possible paths Characterizing new non-scaling dimensions (More than Moore) by parameters that could be used for value assessment e.g. Inductors, MEMS/NEMS, … Seek feedback from pre-competitive consortia like SMT, IMEC, SELETE, etc. Possible TWG involvement preparation/proposals for July ITRS Assy & Packaging : System integration white paper Extension of Design TWG roadmap / system drivers (example Automotive HV power, Sensors) Link PIDS / Design (extending MASTAR to system level) Optical Interconnect RF Wireless … Additional ideas are welcome.

11 11 Backup

12 12 IRC Plenary (Misc. 1) Other IRC Plenary Communication ITEMS: Publication Arrangements CD and Book by Region Linda Wilson only handling the free hardcopies by Region – need quantity by Region (limited number – 60 copies USA (trade for CDs)) Order Hard copies - $160? plus shipping and handling all directly with JEITA Office (limited quantity!) Order Copies ship from Japan (coordinated by JEITA CD (plus Exec Summary – available when?) - $25 nominal cost (still too high?) plus shipping and handling Linda produce Master copy to each region and make their own copies only for internal to Region to ITRS supporters Domestic Regional TWG Composition/Membership Guidelines (Patrick Cogez foil) Old Recommendation for domestic TWG guidance presently from Linda Wilson, (USA-based 1990s -based) guideline of 7 recognized members Managed by Domestic TWG Chairman - Voting by consensus based on equitable distribution Need Revised Region-variable guidelines (USA, Japan, Korea, Taiwan, and Europe) Not mandatory official guidelines, but recommendations to balance consensus influence Need to also discuss at next IRC telecon to update distribution list guidelines How to include emerging regions, such as membership in Worldwide Semiconductor Council (WSC); and identify approval process for actual members for invitation-only communication by Linda Wilson iNEMI Semiconductor Roadmap Chapter Draft (2005 ITRS Exec Summary Re- edit) due May 18 th Final Draft Sept06, publish APEX Feb07

13 13 IRC Plenary (Misc. 2) IEEE & iNEMI Roadmaps IEEE Nano-electronics Standards Roadmap in 5/18 New York – Contact Nathan Tinker/IEEE (Paolo follow up) Reed Semiconductor International - Online Conference - done Apr bits/Flash cell Saifun / Spansion EE Times publication 45nm 4bits/cell production 2008 PIDS Table 43a 4bits/cell after 2010 Alan add to ORTC Tables and Flash Model beginning 2008 as a proposal Timing 2007 ITRS Meetings (Europe SEMICON move out Jun07, Oct08?) ITRS will be held April 23, 24 in France AEC/APC during preceding week 4/18-20 Dresden; other potential meetings in preceding week: INC3 Europe or IMEC review week)] USA – SEMICON USA July 9 th or 16 th Japan – SEMICON Japan end of November, beginning December Wireless not present in Vaalsbroek – need earlier communication - AR Wireless/Huang Important cross-iTWG issues – iTWGs should communicate with Wireless TWG via Telecon in 2Q06? Need to confirm attendance ahead of USA SEMICON ITRS meeting time to inform all iTWGs.


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