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Lecture 17 Today we will discuss

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1 Lecture 17 Today we will discuss
Metal Oxide Semiconductor (MOS) Transistors Physical structure Physical operation Circuit symbol and current/voltage designations Modes of operation I-V Relationship Solution of MOS circuits

2 NMOS (N-Channel Metal Oxide Semiconductor) Transistor
gate source drain metal metal oxide insulator metal n-type n-type e e h e h e e e p-type h h h h metal

3 NMOS Transistor in Equilibrium
gate source drain metal metal oxide insulator metal n-type _ n-type _ h + + + + + + h _ _ _ _ p-type h h metal When the transistor is left alone, some electrons from the n-type wells diffuse into the p-type material to fill holes. This creates negative ions in the p-type material and positive ions are left behind in the n-type material.

4 NMOS Transistor in Cutoff
VGS > 0 gate - + source drain metal metal oxide insulator metal n-type _ _ _ _ n-type _ + + + + + + _ _ _ _ p-type h h h h h metal When a small, positive VGS is applied, holes “move away” from the gate. Electrons from complete atoms elsewhere in the p-type material move to fill holes near the gate instead.

5 NMOS Transistor Channel
VGS > VTH(n) gate - + source drain metal metal oxide insulator metal n-type _ _ _ e e e e _ e n-type + + + _ + + + _ _ _ _ p-type h h h h h h h h h h metal When VGS is larger than a threshold voltage VTH(n), the attraction to the gate is so great that free electrons collect there. The applied VGS creates an induced n-type channel under the gate (an area with free electrons).

6 NMOS Transistor Drain Current
- + VGS > VTH(n) VDS > 0 gate - + source drain metal metal oxide insulator metal n-type _ _ _ e e _ e e e n-type + + + + + + _ _ _ _ _ p-type h h h h h h h h h h metal When a positive VDS is applied, the free electrons flow from the source to the drain. (Positive current flows from drain to source). The amount of current depends on VDS, as well as the number of electrons in the channel, channel dimensions, and material.

7 NMOS Transistor Circuit Symbol
VDS - + VGS drain gate ID - + IG source metal metal oxide insulator metal n-type n-type p-type metal G D S ID IG - VDS + + VGS _

8 NMOS I-V Characteristic
G + VGS _ IG ID S D - VDS + Since the transistor is a 3-terminal device, there is no single I-V characteristic. Note that because of the insulator, IG = 0 A. We typically define the MOS I-V characteristic as ID vs. VDS for a fixed VGS. The I-V characteristic changes as VGS changes.

9 cutoff mode (when VGS < VTH(N))
NMOS I-V Curves ID triode mode saturation mode VGS = 3 V VDS = VGS - VTH(n) VGS = 2 V VGS = 1 V VDS cutoff mode (when VGS < VTH(N))

10 Modes of Operation For small values of VGS, VGS ≤ VTH(n), the n-type channel is not formed. No current flows. This is cutoff mode. When VGS > VTH(n), current ID may flow from drain to source, and the following modes of current flow are possible. The mode of current flow depends on the propelling voltage, VDS, and the channel-inducing voltage, VGS – VTH(n). When VDS < VGS – VTH(n), current is starting to flow. ID increases rapidly with increased VDS. This is triode mode. When VDS ≥ VGS – VTH(n), current is reaching its maximum value. ID does not increase much with increased VDS. This is called saturation mode.

11 Faucet Analogy Imagine the faucet on your kitchen sink.
To make water flow, the water supply has to be connected to the faucet. This establishes a path for water to flow. Setting VGS above the threshold voltage is like connecting the water supply. Cutoff = water supply disconnected (no path for current flow) Setting VGS to a larger value is like connecting a high-pressure water supply—more flow can potentially occur.

12 Faucet Analogy The faucet itself is used to adjust water flow. You can turn the flow up and down. VDS is like the faucet. It controls the amount of flow. There is, of course, a saturation point. If you keep turning the faucet control, eventually you won’t get any more flow. Triode = faucet in “normal range”, controls flow Saturation = faucet turned up to (or past) point for maximum flow

13 NMOS Equations Cutoff Mode Occurs when VGS ≤ VTH(n) ID = 0 Triode Mode
Occurs when VGS > VTH(n) and VDS < VGS - VTH(n) Saturation Mode Occurs when VGS > VTH(n) and VDS ≥ VGS - VTH(n)

14 PMOS (P-Channel Metal Oxide Semiconductor) Transistor
gate source drain metal metal oxide insulator metal p-type p-type n-type metal Same as NMOS, only p-type and n-type switched

15 PMOS Transistor Channel
VGS < VTH(p) < 0 gate - + source drain metal metal oxide insulator metal p-type h h + h + h + + h + p-type _ _ _ _ _ _ + + + + + + n-type e e e e e e e e e e metal When VGS is more negative than a threshold voltage VTH(p), the gate attracts many positive ions and holes (repels electrons) Thus the applied VGS creates an induced p-type channel under the gate (an area with positive ions).

16 PMOS Transistor Drain Current
- + VGS < VTH(P) < 0 VDS < 0 drain gate - + source metal metal oxide insulator metal p-type h + h + h + h + h + p-type _ _ _ _ _ _ + + + + + + n-type e e e e e e e e e e metal When a negative VDS is applied, the positive ions flow from the source to the drain. (Positive current flows from source to drain). The amount of current depends on VDS, as well as the number of ions in the channel, channel dimensions, and material.

17 PMOS Transistor Circuit Symbol
G IG + VGS _ ID S D - VDS + Symbol has “dot” at gate. NMOS does not. ID, VGS, VDS, and VTH(p) are all negative. These values are positive for NMOS. Channel formed when VGS < VTH(p). Opposite for NMOS. Saturation occurs when VDS ≤ VGS – VTH(p). Opposite for NMOS.

18 PMOS I-V Curves cutoff mode VDS VGS = -1 V VGS = -2 V
VDS = VGS - VTH(p) VGS = -3 V ID saturation mode triode mode

19 PMOS Equations Cutoff Mode Occurs when VGS ≥ VTH(p) ID = 0 Triode Mode
Occurs when VGS < VTH(p) and VDS > VGS - VTH(p) Saturation Mode Occurs when VGS < VTH(p) and VDS ≤ VGS - VTH(p)

20 Solving Transistor Circuits
Guess the transistor mode (for each transistor). Sometimes you can make educated guess Write down the I-V relationships that go with those modes: 1 equation, 3 unknowns (ID, VDS, VGS) for each transistor Write down KVL and KCL equations (enough so that we can solve for the 3 unknowns) Check values of ID, VDS, VGS – do they agree with mode? If yes, done. Else, start over with new guess.

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