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1 MOS Field-Effect Transistors (MOSFETs). Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith2 Figure.

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Presentation on theme: "1 MOS Field-Effect Transistors (MOSFETs). Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith2 Figure."— Presentation transcript:

1 1 MOS Field-Effect Transistors (MOSFETs)

2 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith2 Figure 4.1 Physical structure of the enhancement-type NMOS transistor: (a) perspective view; (b) cross-section. Typically L = 0.1 to 3  m, W = 0.2 to 100  m, and the thickness of the oxide layer (t ox ) is in the range of 2 to 50 nm.

3 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith3 Figure 4.2 The enhancement-type NMOS transistor with a positive voltage applied to the gate. An n channel is induced at the top of the substrate beneath the gate.

4 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith4 Figure 4.3 An NMOS transistor with v GS > V t and with a small v DS applied. The device acts as a resistance whose value is determined by v GS. Specifically, the channel conductance is proportional to v GS – V t’ and thus i D is proportional to ( v GS – V t ) v DS. Note that the depletion region is not shown (for simplicity).

5 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith5 Figure 4.4 The i D – v DS characteristics of the MOSFET in Fig. 4.3 when the voltage applied between drain and source, v DS, is kept small. The device operates as a linear resistor whose value is controlled by v GS.

6 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith6 Figure 4.5 Operation of the enhancement NMOS transistor as v DS is increased. The induced channel acquires a tapered shape, and its resistance increases as v DS is increased. Here, v GS is kept constant at a value > V t.

7 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith7 Figure 4.6 The drain current i D versus the drain-to-source voltage v DS for an enhancement-type NMOS transistor operated with v GS > V t.

8 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith8 Figure 4.7 Increasing v DS causes the channel to acquire a tapered shape. Eventually, as v DS reaches v GS – V t’ the channel is pinched off at the drain end. Increasing v DS above v GS – V t has little effect (theoretically, no effect) on the channel’s shape.

9 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith9 Figure 4.8 Derivation of the i D – v DS characteristic of the NMOS transistor.

10 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith10 Figure 4.9 Cross-section of a CMOS integrated circuit. Note that the PMOS transistor is formed in a separate n-type region, known as an n well. Another arrangement is also possible in which an n-type body is used and the n device is formed in a p well. Not shown are the connections made to the p-type body and to the n well; the latter functions as the body terminal for the p-channel device.

11 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith11 Figure 4.10 (a) Circuit symbol for the n-channel enhancement-type MOSFET. (b) Modified circuit symbol with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n channel). (c) Simplified circuit symbol to be used when the source is connected to the body or when the effect of the body on device operation is unimportant.

12 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith12 Figure 4.11 (a) An n-channel enhancement-type MOSFET with v GS and v DS applied and with the normal directions of current flow indicated. (b) The i D – v DS characteristics for a device with k’ n (W/L) = 1.0 mA/V 2.

13 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith13 Figure 4.12 The i D – v GS characteristic for an enhancement-type NMOS transistor in saturation (V t = 1 V, k’ n W/L = 1.0 mA/V 2 ).

14 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith14 Figure 4.13 Large-signal equivalent-circuit model of an n-channel MOSFET operating in the saturation region.

15 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith15 Figure 4.14 The relative levels of the terminal voltages of the enhancement NMOS transistor for operation in the triode region and in the saturation region.

16 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith16 Figure 4.15 Increasing v DS beyond v DSsat causes the channel pinch-off point to move slightly away from the drain, thus reducing the effective channel length (by D L).

17 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith17 Figure 4.16 Effect of v DS on i D in the saturation region. The MOSFET parameter V A depends on the process technology and, for a given process, is proportional to the channel length L.

18 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith18 Figure 4.17 Large-signal equivalent circuit model of the n-channel MOSFET in saturation, incorporating the output resistance r o. The output resistance models the linear dependence of i D on v DS and is given by Eq. (4.22).

19 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith19 Figure 4.18 (a) Circuit symbol for the p-channel enhancement-type MOSFET. (b) Modified symbol with an arrowhead on the source lead. (c) Simplified circuit symbol for the case where the source is connected to the body. (d) The MOSFET with voltages applied and the directions of current flow indicated. Note that v GS and v DS are negative and i D flows out of the drain terminal.

20 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith20 Figure 4.19 The relative levels of the terminal voltages of the enhancement-type PMOS transistor for operation in the triode region and in the saturation region.

21 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith21 Figure E4.8

22 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith22 Table 4.1

23 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith23 Figure 4.20 Circuit for Example 4.2.

24 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith24 Figure 4.21 Circuit for Example 4.3.

25 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith25 Figure E4.12

26 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith26 Figure 4.22 Circuit for Example 4.4.

27 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith27 Figure 4.23 (a) Circuit for Example 4.5. (b) The circuit with some of the analysis details shown.

28 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith28 Figure 4.24 Circuit for Example 4.6.

29 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith29 Figure 4.25 Circuits for Example 4.7.

30 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith30 Figure E4.16

31 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith31 Figure 4.26 (a) Basic structure of the common-source amplifier. (b) Graphical construction to determine the transfer characteristic of the amplifier in (a).

32 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith32 Figure 4.26 (Continued) (c) Transfer characteristic showing operation as an amplifier biased at point Q.

33 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith33 Figure 4.27 Two load lines and corresponding bias points. Bias point Q 1 does not leave sufficient room for positive signal swing at the drain (too close to V DD ). Bias point Q 2 is too close to the boundary of the triode region and might not allow for sufficient negative signal swing.

34 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith34 Figure 4.28 Example 4.8.

35 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith35 Figure 4.28 (Continued)

36 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith36 Figure 4.29 The use of fixed bias (constant V GS ) can result in a large variability in the value of I D. Devices 1 and 2 represent extremes among units of the same type.

37 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith37 Figure 4.30 Biasing using a fixed voltage at the gate, V G, and a resistance in the source lead, R S : (a) basic arrangement; (b) reduced variability in I D ; (c) practical implementation using a single supply; (d) coupling of a signal source to the gate using a capacitor C C1 ; (e) practical implementation using two supplies.

38 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith38 Figure 4.31 Circuit for Example 4.9.

39 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith39 Figure 4.32 Biasing the MOSFET using a large drain-to-gate feedback resistance, R G.

40 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith40 Figure 4.33 (a) Biasing the MOSFET using a constant-current source I. (b) Implementation of the constant-current source I using a current mirror.

41 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith41 Figure 4.34 Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier.

42 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith42 Figure 4.35 Small-signal operation of the enhancement MOSFET amplifier.

43 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith43 Figure 4.36 Total instantaneous voltages v GS and v D for the circuit in Fig

44 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith44 Figure 4.37 Small-signal models for the MOSFET: (a) neglecting the dependence of i D on v DS in saturation (the channel-length modulation effect); and (b) including the effect of channel-length modulation, modeled by output resistance r o = |V A | /I D.

45 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith45 Figure 4.38 Example 4.10: (a) amplifier circuit; (b) equivalent-circuit model.

46 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith46 Figure 4.39 Development of the T equivalent-circuit model for the MOSFET. For simplicity, r o has been omitted but can be added between D and S in the T model of (d).

47 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith47 Figure 4.40 (a) The T model of the MOSFET augmented with the drain-to-source resistance r o. (b) An alternative representation of the T model.

48 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith48 Figure 4.41 Small-signal equivalent-circuit model of a MOSFET in which the source is not connected to the body.

49 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith49 Table 4.2

50 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith50 Figure 4.42 Basic structure of the circuit used to realize single-stage discrete-circuit MOS amplifier configurations.

51 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith51 Figure E4.30

52 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith52 Table 4.3

53 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith53 Figure 4.43 (a) Common-source amplifier based on the circuit of Fig (b) Equivalent circuit of the amplifier for small-signal analysis. (c) Small-signal analysis performed directly on the amplifier circuit with the MOSFET model implicitly utilized.

54 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith54 Figure 4.44 (a) Common-source amplifier with a resistance R S in the source lead. (b) Small-signal equivalent circuit with r o neglected.

55 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith55 Figure 4.45 (a) A common-gate amplifier based on the circuit of Fig (b) A small-signal equivalent circuit of the amplifier in (a). (c) The common-gate amplifier fed with a current-signal input.

56 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith56 Figure 4.46 (a) A common-drain or source-follower amplifier. (b) Small-signal equivalent-circuit model. (c) Small-signal analysis performed directly on the circuit. (d) Circuit for determining the output resistance R out of the source follower.

57 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith57 Table 4.4

58 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith58 Table 4.4 (Continued)

59 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith59 Figure 4.47 (a) High-frequency equivalent circuit model for the MOSFET. (b) The equivalent circuit for the case in which the source is connected to the substrate (body). (c) The equivalent circuit model of (b) with C db neglected (to simplify analysis).

60 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith60 Figure 4.48 Determining the short-circuit current gain I o /I i.

61 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith61 Table 4.5

62 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith62 Figure 4.49 (a) Capacitively coupled common-source amplifier. (b) A sketch of the frequency response of the amplifier in (a) delineating the three frequency bands of interest.

63 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith63 Figure 4.50 Determining the high-frequency response of the CS amplifier: (a) equivalent circuit; (b) the circuit of (a) simplified at the input and the output;

64 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith64 Figure 4.50 (Continued) (c) the equivalent circuit with C gd replaced at the input side with the equivalent capacitance C eq ; (d) the frequency response plot, which is that of a low-pass single-time-constant circuit.

65 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith65 Figure 4.51 Analysis of the CS amplifier to determine its low-frequency transfer function. For simplicity, r o is neglected.

66 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith66 Figure 4.52 Sketch of the low-frequency magnitude response of a CS amplifier for which the three break frequencies are sufficiently separated for their effects to appear distinct.

67 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith67 Figure 4.53 The CMOS inverter.

68 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith68 Figure 4.54 Operation of the CMOS inverter when v I is high: (a) circuit with v I = V DD (logic-1 level, or V OH ); (b) graphical construction to determine the operating point; (c) equivalent circuit.

69 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith69 Figure 4.55 Operation of the CMOS inverter when v I is low: (a) circuit with v I = 0 V (logic-0 level, or V OL ); (b) graphical construction to determine the operating point; (c) equivalent circuit.

70 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith70 Figure 4.56 The voltage transfer characteristic of the CMOS inverter.

71 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith71 Figure 4.57 Dynamic operation of a capacitively loaded CMOS inverter: (a) circuit; (b) input and output waveforms; (c) trajectory of the operating point as the input goes high and C discharges through Q N ; (d) equivalent circuit during the capacitor discharge.

72 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith72 Figure 4.58 The current in the CMOS inverter versus the input voltage.

73 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith73 Figure 4.59 (a) Circuit symbol for the n-channel depletion-type MOSFET. (b) Simplified circuit symbol applicable for the case the substrate (B) is connected to the source (S).

74 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith74 Figure 4.60 The current-voltage characteristics of a depletion-type n-channel MOSFET for which V t = –4 V and k n (W/L) = 2 mA/V 2 : (a) transistor with current and voltage polarities indicated; (b) the i D – v DS characteristics; (c) the i D – v GS characteristic in saturation.

75 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith75 Figure 4.61 The relative levels of terminal voltages of a depletion-type NMOS transistor for operation in the triode and the saturation regions. The case shown is for operation in the enhancement mode ( v GS is positive).

76 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith76 Figure 4.62 Sketches of the i D – v GS characteristics for MOSFETs of enhancement and depletion types, of both polarities (operating in saturation). Note that the characteristic curves intersect the v GS axis at V t. Also note that for generality somewhat different values of |V t | are shown for n-channel and p-channel devices.

77 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith77 Figure E4.51

78 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith78 Figure E4.52

79 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith79 Figure 4.63 Capture schematic of the CS amplifier in Example 4.14.

80 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith80 Figure 4.64 Frequency response of the CS amplifier in Example 4.14 with C S = 10  F and C S = 0 (i.e., C S removed).

81 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith81 Figure P4.18

82 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith82 Figure P4.33

83 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith83 Figure P4.36

84 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith84 Figure P4.37

85 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith85 Figure P4.38

86 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith86 Figure P4.41

87 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith87 Figure P4.42

88 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith88 Figure P4.43

89 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith89 Figure P4.44

90 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith90 Figure P4.45

91 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith91 Figure P4.46

92 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith92 Figure P4.47

93 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith93 Figure P4.48

94 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith94 Figure P4.54

95 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith95 Figure P4.61

96 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith96 Figure P4.66

97 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith97 Figure P4.74

98 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith98 Figure P4.75

99 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith99 Figure P4.77

100 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith100 Figure P4.86

101 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith101 Figure P4.87

102 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith102 Figure P4.88

103 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith103 Figure P4.97

104 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith104 Figure P4.99

105 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith105 Figure P4.101

106 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith106 Figure P4.104

107 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith107 Figure P4.117

108 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith108 Figure P4.120

109 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith109 Figure P4.121

110 Copyright  2004 by Oxford University Press, Inc. Microelectronic Circuits - Fifth Edition Sedra/Smith110 Figure P4.123


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