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ELEC 301 SPRING 2009 VOLKAN KURSUN ELEC 301 Design Metrics Volkan Kursun

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ELEC 301 SPRING 2009 VOLKAN KURSUNAnnouncements Project is announced Form a group of two students by March (next Thursday) Give the names of your group members to the lab technician Alex by March You cannot modify the group members after March 19

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ELEC 301 SPRING 2009 VOLKAN KURSUNAnnouncements HW1 solution is on the web HW2: on the web Midterm exam Venue: Lecture Theater A Date: 31 Mar 2009 (Tue) Time: 18: :00 Closed book exam No copy sheets Bring a calculator

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ELEC 301 SPRING 2009 VOLKAN KURSUN Representation of Digital Signals Digital systems perform operations on logical (Boolean) variables A logical variable can have two discrete values –X: 0, 1 A logical variable is a mathematical abstraction Physical implementation requires the representation of logical variables with electrical quantities Voltage

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ELEC 301 SPRING 2009 VOLKAN KURSUN Representation of Digital Signals Node voltage Not discrete Has a continuous range of values Turn the electrical voltage into a discrete variable by associating a nominal voltage level with each logic state 1: VOH 0: VOL VOH and VOL represent the nominal high and low logic levels, respectively

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ELEC 301 SPRING 2009 VOLKAN KURSUN Reliability Noise in Digital Integrated Circuits i(t) Inductive coupling Capacitive couplingPower and ground noise v (t) V DD Noise: unwanted variation of voltage and current at a circuit node

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ELEC 301 SPRING 2009 VOLKAN KURSUN Mapping Between Analog and Digital Signals 0 V OL V IL V IH V OH Undefined Region 1 Digital circuits can tolerate certain amount of deviations from the nominal voltages Logic levels are represented by a range of acceptable voltages, rather than only by a nominal voltage The voltage ranges of logic levels are separated by a region of uncertainty

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ELEC 301 SPRING 2009 VOLKAN KURSUN DC Operation Voltage Transfer Characteristics Electrical function of a gate is determined by the voltage transfer characteristics DC transfer characteristics Plot the output voltage as a function of the input voltage Vout = f (Vin) Determine the acceptable ranges of input and output voltages

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ELEC 301 SPRING 2009 VOLKAN KURSUN DC Operation Voltage Transfer Characteristic V in V out V OH V OL VMVM V OH V OL f V out = V in Switching Threshold Voltage Nominal Voltage Levels V OH = f(V OL ) V OL = f(V OH ) V M = f(V M )

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ELEC 301 SPRING 2009 VOLKAN KURSUN V IL V IH V in Slope = -1 V OL V OH V out 0 V OL V IL V IH V OH Undefined Region 1 The regions of acceptable high and low voltages are delimited by V IH and V IL V in = V out Gate switching threshold voltage Mapping Between Analog and Digital Signals

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ELEC 301 SPRING 2009 VOLKAN KURSUN Noise Margins For a gate to be robust, the acceptable voltage ranges of the 0 and 1 logic levels must be as large as possible Concept of noise margins A measure of the tolerance of a gate to noise Noise margin low (NML) Quantizes the range of voltages considered valid 0 Noise margin high (NMH) Quantizes the range of voltages considered valid 1

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ELEC 301 SPRING 2009 VOLKAN KURSUN Definition of Noise Margins Noise margin high Noise margin low V IH V IL Undefined Region "1" "0" V OH V OL NM H L Gate Output Gate Input Steady-state signals must avoid the undefined region for a proper operation Lowest voltage that is considered logic high: 1 Highest voltage that is considered logic low: 0

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ELEC 301 SPRING 2009 VOLKAN KURSUN Noise Budget Noise sources: supply noise, cross talk, and interference Differentiate between static and dynamic noise sources Static noise budget allocates gross noise margins to expected sources of noise Static noise margins result in very conservative designs

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ELEC 301 SPRING 2009 VOLKAN KURSUN Regenerative Property A voltage v0 that deviates from the nominal voltages is applied to the first inverter The signal gradually converges to one of the nominal values after a number of inverter stages

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ELEC 301 SPRING 2009 VOLKAN KURSUN Signal Regeneration (Restoration) A chain of inverters v 0 v 1 v 2 v 3 v 4 v 5 v 6 Simulated response Ex: Chain input signal Vo is degraded due to noise reduced voltage swing The deviation in voltage levels disappears as the signals propagate through a chain of inverters

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ELEC 301 SPRING 2009 VOLKAN KURSUN Fan-in and Fan-out N Fan-out N Fan-in M M Fan-out: number of loading gates connected to the output of a gate Fan-in: number of inputs

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ELEC 301 SPRING 2009 VOLKAN KURSUN Fan-in and Fan-out N Fan-out N Increasing the fan-out can affect the output logic level To minimize the effect of fan- out on logic levels Input resistance of load gates must be as large as possible –Low output current to the fan-out gates Output resistance of the driver gate must be as small as possible –Reduce the effect of output currents on the output voltage level

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ELEC 301 SPRING 2009 VOLKAN KURSUN The Ideal Gate Voltage Transfer Characteristics R i = R o = 0 Fanout = NM H = NM L = V DD /2 g = V in V out

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ELEC 301 SPRING 2009 VOLKAN KURSUN An Old-time Inverter: NMOS NM H V in (V) V out (V) NM L V M V DD = 5V, V GND = 0V V OH = 3.5V, V OL = 0.45V, V IH = 2.35V, VIL = 0.66V, V M = 1.64V, NM L = 0.21V, NM H = 1.15V Issues: Asymmetrical VTC Narrow noise margins Low NML V OH < V DD V OL > 0 Low output voltage swing (V OH - V OL ) < V DD

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ELEC 301 SPRING 2009 VOLKAN KURSUN Delay Definitions How quickly does a circuit respond to a change of the inputs? Delay experienced by a signal while propagating through a circuit Propagation delay is a function of Technology –GaAs vs. silicon CMOS Circuit topology Slopes of the input signals Load and driver impedances

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ELEC 301 SPRING 2009 VOLKAN KURSUN Delay Definitions High-to-low and low-to-high propagation delays t p = (t PHL + t PLH ) / 2 Rise time: t r Fall time: t f

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ELEC 301 SPRING 2009 VOLKAN KURSUN Ring Oscillator T = 2 t p N For oscillation: 2Nt p >> t r +t f Otherwise the propagating signals overlap and dampen the oscillation

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ELEC 301 SPRING 2009 VOLKAN KURSUN A First-Order RC Network v out v in C R t p = ln (2) = 0.69 RC Simplest model to represent the delay of an inverter

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ELEC 301 SPRING 2009 VOLKAN KURSUN Power: energy dissipated or stored per unit of time Influences several design decisions Power supply Power distribution network –Nominal supply voltage VDD and tolerable variation –Supply current demand Battery lifetime Heat dissipation –Packaging –Cooling system Power Dissipation

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ELEC 301 SPRING 2009 VOLKAN KURSUN Limits the number of devices than can be integrated on an IC Limits how fast a circuit can operate Faster circuits tend to consume more power Limits the number of operations that can be performed between battery changes Power Dissipation

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ELEC 301 SPRING 2009 VOLKAN KURSUN Instantaneous power: p(t) = v(t)i(t) = V supply i(t) Peak power: p peak = V supply i peak = max [p(t)] Critical in power supply and distribution network design Average power: Critical to determine the cooling and battery requirements Power Dissipation

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ELEC 301 SPRING 2009 VOLKAN KURSUN Power – Components Dynamic power: Occurs during transients when a circuit is switching Due to charging of capacitors + temporary current paths between the supply rails Proportional to the switching frequency –The higher the number of switching events the greater the dynamic power consumption Static power: Occurs statically, all the time, regardless of a switching activity Caused by the static conduction paths between the supply rails and the leakage currents

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ELEC 301 SPRING 2009 VOLKAN KURSUN Power – Speed Relationship Propagation delay is determined by the speed at which a given amount of energy can be transferred to/from the parasitic capacitors of a circuit (C = Q / V) The faster the energy transfer, the higher the circuit speed is –Faster energy transfer means higher power consumption Reminder: –Power: energy dissipated or stored per unit of time

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ELEC 301 SPRING 2009 VOLKAN KURSUN A First-Order RC Network v out v in CLCL R

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ELEC 301 SPRING 2009 VOLKAN KURSUN Energy and Energy-Delay Product Power-Delay Product (PDP) = P av t p PDP: Energy (E) consumed by a gate per switching event Energy-Delay Product (EDP) = power x delay 2 quality metric of a gate = E t p

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