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**ELEC 301 Volkan Kursun Design Metrics ECE555 - Volkan Kursun**

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**Announcements Project is announced**

ECE555 - Volkan Kursun Announcements Project is announced Form a group of two students by March (next Thursday) Give the names of your group members to the lab technician Alex by March You cannot modify the group members after March 19 ECE555 - Volkan Kursun

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**Announcements HW1 solution is on the web HW2: on the web Midterm exam**

ECE555 - Volkan Kursun Announcements HW1 solution is on the web HW2: on the web Midterm exam Venue: Lecture Theater A Date: 31 Mar 2009 (Tue) Time: 18: :00 Closed book exam No copy sheets Bring a calculator ECE555 - Volkan Kursun

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**Representation of Digital Signals**

ECE555 - Volkan Kursun Representation of Digital Signals Digital systems perform operations on logical (Boolean) variables A logical variable can have two discrete values X: 0, 1 A logical variable is a mathematical abstraction Physical implementation requires the representation of logical variables with electrical quantities Voltage ECE555 - Volkan Kursun

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**Representation of Digital Signals**

ECE555 - Volkan Kursun Representation of Digital Signals Node voltage Not discrete Has a continuous range of values Turn the electrical voltage into a discrete variable by associating a nominal voltage level with each logic state 1: VOH 0: VOL VOH and VOL represent the nominal high and low logic levels, respectively ECE555 - Volkan Kursun

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**Reliability― Noise in Digital Integrated Circuits**

ECE555 - Volkan Kursun Reliability― Noise in Digital Integrated Circuits v ( t ) V DD i ( t ) Inductive coupling Capacitive coupling Power and ground noise Noise: unwanted variation of voltage and current at a circuit node ECE555 - Volkan Kursun

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**Mapping Between Analog and Digital Signals**

ECE555 - Volkan Kursun Mapping Between Analog and Digital Signals Digital circuits can tolerate certain amount of deviations from the nominal voltages Logic levels are represented by a range of acceptable voltages, rather than only by a nominal voltage The voltage ranges of logic levels are separated by a region of uncertainty OH OL IH IL V V V V ” ” 1 Undefined Region “ “ ECE555 - Volkan Kursun

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**DC Operation Voltage Transfer Characteristics**

ECE555 - Volkan Kursun DC Operation Voltage Transfer Characteristics Electrical function of a gate is determined by the voltage transfer characteristics DC transfer characteristics Plot the output voltage as a function of the input voltage Vout = f (Vin) Determine the acceptable ranges of input and output voltages ECE555 - Volkan Kursun

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**DC Operation Voltage Transfer Characteristic**

ECE555 - Volkan Kursun DC Operation Voltage Transfer Characteristic Vout VOH = f(VOL) VOL = f(VOH) VM = f(VM) V f OH Vout = Vin VM Switching Threshold Voltage V OL V V Vin OL OH Nominal Voltage Levels ECE555 - Volkan Kursun

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**Mapping Between Analog and Digital Signals**

ECE555 - Volkan Kursun Mapping Between Analog and Digital Signals The regions of acceptable high and low voltages are delimited by VIH and VIL V out V “ 1 ” OH Slope = -1 V OH V IH Vin = Vout Undefined Gate switching threshold voltage Region V IL Slope = -1 V “ ” V OL OL V V V IL IH in ECE555 - Volkan Kursun

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ECE555 - Volkan Kursun Noise Margins For a gate to be robust, the acceptable voltage ranges of the “0” and “1” logic levels must be as large as possible Concept of noise margins A measure of the tolerance of a gate to noise Noise margin low (NML) Quantizes the range of voltages considered valid 0 Noise margin high (NMH) Quantizes the range of voltages considered valid 1 ECE555 - Volkan Kursun

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**Definition of Noise Margins**

ECE555 - Volkan Kursun Definition of Noise Margins Steady-state signals must avoid the undefined region for a proper operation Lowest voltage that is considered logic high: “1” "1" V OH NM Noise margin high H V IH Undefined Region NM V Noise margin low L IL V OL Highest voltage that is considered logic low: “0” "0" Gate Output Gate Input ECE555 - Volkan Kursun

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**Noise Budget Noise sources: supply noise, cross talk, and interference**

ECE555 - Volkan Kursun Noise Budget Noise sources: supply noise, cross talk, and interference Differentiate between static and dynamic noise sources Static noise budget allocates gross noise margins to expected sources of noise Static noise margins result in very conservative designs ECE555 - Volkan Kursun

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**Regenerative Property**

ECE555 - Volkan Kursun Regenerative Property A voltage v0 that deviates from the nominal voltages is applied to the first inverter The signal gradually converges to one of the nominal values after a number of inverter stages ECE555 - Volkan Kursun

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**Signal Regeneration (Restoration)**

ECE555 - Volkan Kursun Ex: Chain input signal Vo is degraded due to noise → reduced voltage swing v 1 2 3 4 5 6 A chain of inverters The deviation in voltage levels disappears as the signals propagate through a chain of inverters Simulated response ECE555 - Volkan Kursun

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Fan-in and Fan-out ECE555 - Volkan Kursun Fan-out: number of loading gates connected to the output of a gate Fan-in: number of inputs N Fan-out N M Fan-in M ECE555 - Volkan Kursun

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Fan-in and Fan-out ECE555 - Volkan Kursun Increasing the fan-out can affect the output logic level To minimize the effect of fan-out on logic levels Input resistance of load gates must be as large as possible Low output current to the fan-out gates Output resistance of the driver gate must be as small as possible Reduce the effect of output currents on the output voltage level N Fan-out N ECE555 - Volkan Kursun

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**The Ideal Gate Voltage Transfer Characteristics**

ECE555 - Volkan Kursun The Ideal Gate Voltage Transfer Characteristics V out R i = R o = 0 Fanout = ¥ NMH = NML = VDD/2 g = V in ECE555 - Volkan Kursun

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**An Old-time Inverter: NMOS**

ECE555 - Volkan Kursun VDD = 5V, VGND = 0V VOH = 3.5V, VOL = 0.45V, VIH = 2.35V, VIL = 0.66V, VM = 1.64V, NML = 0.21V, NMH = 1.15V NM H V in (V) out L M 0.0 1.0 2.0 3.0 4.0 5.0 Issues: Asymmetrical VTC Narrow noise margins Low NML VOH < VDD VOL > 0 Low output voltage swing (VOH - VOL) < VDD ECE555 - Volkan Kursun

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Delay Definitions ECE555 - Volkan Kursun How quickly does a circuit respond to a change of the inputs? Delay experienced by a signal while propagating through a circuit Propagation delay is a function of Technology GaAs vs. silicon CMOS Circuit topology Slopes of the input signals Load and driver impedances ECE555 - Volkan Kursun

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**Delay Definitions High-to-low and low-to-high propagation delays**

ECE555 - Volkan Kursun High-to-low and low-to-high propagation delays tp = (tPHL + tPLH) / 2 Rise time: tr Fall time: tf ECE555 - Volkan Kursun

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**Ring Oscillator For oscillation: 2Ntp >> tr+tf T = 2 ´ t N 1 1 1**

ECE555 - Volkan Kursun 1 1 1 1 1 1 T = 2 t p N For oscillation: 2Ntp >> tr+tf Otherwise the propagating signals overlap and dampen the oscillation ECE555 - Volkan Kursun

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**A First-Order RC Network**

ECE555 - Volkan Kursun A First-Order RC Network v out in C R tp = ln (2) t = 0.69 RC Simplest model to represent the delay of an inverter ECE555 - Volkan Kursun

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**Power Dissipation Power: energy dissipated or stored per unit of time**

ECE555 - Volkan Kursun Power: energy dissipated or stored per unit of time Influences several design decisions Power supply Power distribution network Nominal supply voltage VDD and tolerable variation Supply current demand Battery lifetime Heat dissipation Packaging Cooling system ECE555 - Volkan Kursun

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Power Dissipation ECE555 - Volkan Kursun Limits the number of devices than can be integrated on an IC Limits how fast a circuit can operate Faster circuits tend to consume more power Limits the number of operations that can be performed between battery changes ECE555 - Volkan Kursun

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**Power Dissipation Instantaneous power: p(t) = v(t)i(t) = Vsupplyi(t)**

ECE555 - Volkan Kursun Instantaneous power: p(t) = v(t)i(t) = Vsupplyi(t) Peak power: ppeak = Vsupplyipeak = max [p(t)] Critical in power supply and distribution network design Average power: Critical to determine the cooling and battery requirements ECE555 - Volkan Kursun

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Power – Components ECE555 - Volkan Kursun Dynamic power: Occurs during transients when a circuit is switching Due to charging of capacitors + temporary current paths between the supply rails Proportional to the switching frequency The higher the number of switching events the greater the dynamic power consumption Static power: Occurs statically, all the time, regardless of a switching activity Caused by the static conduction paths between the supply rails and the leakage currents ECE555 - Volkan Kursun

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**Power – Speed Relationship**

ECE555 - Volkan Kursun Propagation delay is determined by the speed at which a given amount of energy can be transferred to/from the parasitic capacitors of a circuit (C = Q / V) The faster the energy transfer, the higher the circuit speed is Faster energy transfer means higher power consumption Reminder: Power: energy dissipated or stored per unit of time ECE555 - Volkan Kursun

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**A First-Order RC Network**

ECE555 - Volkan Kursun A First-Order RC Network R v out v in CL ECE555 - Volkan Kursun

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**Energy and Energy-Delay Product**

ECE555 - Volkan Kursun Energy and Energy-Delay Product Power-Delay Product (PDP) = Pav tp PDP: Energy (E) consumed by a gate per switching event Energy-Delay Product (EDP) = power x delay2 quality metric of a gate = E tp ECE555 - Volkan Kursun

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Power, Energy and Delay Static CMOS is an attractive design style because of its good noise margins, ideal voltage transfer characteristics, full logic.

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