1. Computer Organization Computer Organization Review: Combinational circuits Week 1 Lecture Notes Adapted by Dr. Adel Ammar

2. Computer Organization Combinational vs. sequential digital circuits v

3. Computer Organization Part 1: Design

4. Computer Organization 4 Overview vDesign digital circuit from specification vDigital inputs and outputs known ðNeed to determine logic that can transform data vStart in truth table form vCreate K-map for each output based on function of inputs vDetermine minimized sum-of-product representation vDraw circuit diagram

5. Computer Organization 5 Design Procedure vBoolean algebra can be used to simplify expressions, but not obvious: ðhow to proceed at each step, or ðif solution reached is minimal. vThere are five ways to represent a function: ðBoolean expression ðtruth table ðlogic circuit ðminterms/maxterms ðKarnaugh map

6. Computer Organization 6 Combinational logic design vUse multiple representations of logic functions vUse graphical representation to assist in simplification of function. vUse concept of “don’t care” conditions. vExample ðencoding BCD to seven segment display.

7. Computer Organization 7 BCD to Seven Segment Display vUsed to display binary coded decimal (BCD) numbers using seven illuminated segments. vBCD uses 0’s and 1’s to represent decimal digits 0 - 9. Need four bits to represent required 10 digits. vBinary coded decimal (BCD) represents each decimal digit with four bits a b c g e d f

8. Computer Organization 8 BCD to seven segment display vList the segments that should be illuminated for each digit. 0a,b,c,d,e,f 1b,c 2a,b,d,e,g 3a,b,c,d,g 4b,c,f,g 5a,c,d,f,g 6a,c,d,e,f,g 7a,b,c 8a,b,c,d,e,f,g 9a,b,c,d,f,g a b c g e d f

9. Computer Organization 9 BCD to seven segment display vDerive the truth table for the circuit. vEach output column in one circuit..0111110019.1111100018.0011111107..1101101002.0011010001.1111100000.edcbazyxwDec  InputsOutputs

10. Computer Organization 10 BCD to seven segment display vFind minimal sum-of-products representation for each output 1 0 10 11 11 1 1 yz wx 10 11 01 00 10110100 For segment “a” : Note: Have only filled in ten squares, corresponding to the ten numerical digits we wish to represent.

11. Computer Organization 11 Don’t care conditions (BCD display)... vFill in don’t cares for undefined outputs. ðNote that these combinations of inputs should never happen. vLeads to a reduced implementation 1 0 10 11XX XXXX 11 1 1 yz wx 10 11 01 00 10110100 For segment “a” : Put in “X” (don’t care), and interpret as either 1 or 0 as desired ….

12. Computer Organization 12 Don’t care conditions (BCD display)... vCircle biggest group of 1’s and Don’t Cares. vLeads to a reduced implementation For segment “a” : 1 0 10 11XX XXXX 11 1 1 yz wx 10 11 01 00 10110100

13. Computer Organization 13 Don’t care conditions (BCD display) vCircle biggest group of 1’s and Don’t Cares. vLeads to a reduced implementation For segment “a” : 1 0 10 11XX XXXX 11 1 1 yz wx 10 11 01 00 10110100

14. Computer Organization 14 Don’t care conditions (BCD display)... vCircle biggest group of 1’s and Don’t Cares. vAll 1’s should be covered by at least one implicant For segment “a” : 1 0 10 11XX XXXX 11 1 1 yz wx 10 11 01 00 10110100 1 0 10 11XX XXXX 11 1 1 yz wx 10 11 01 00 10110100

15. Computer Organization 15 Don’t care conditions (BCD display)... v Put all the terms together vGenerate the circuit For segment “a” : 1 0 10 11XX XXXX 11 1 1 yz wx 10 11 01 00 10110100

16. Computer Organization 16 BCD to seven segment display vDerive the truth table for the circuit. vEach output column in one circuit..0111110019.1111100018.0011111107..1101101002.0011010001.1111100000.edcbazyxwDec  InputsOutputs

17. Computer Organization 17 BCD to seven segment display vFind minimal sum-of-products representation for each output 1 1 01 11 10 1 1 yz wx 10 11 01 00 10110100 For segment “b” : See if you complete this example.

18. Computer Organization 18 Summary vNeed to formulate circuits from problem description ðDetermine number of inputs and outputs ðDetermine truth table format ðDetermine K-map ðDetermine minimal SOP vThere may be multiple outputs per design ðSolve each output separately vCurrent approach doesn’t have memory.

19. Computer Organization Part 2: Adder and substractor

20. Computer Organization 20 vAddition and subtraction of binary data is fundamental ðNeed to determine hardware implementation vRepresent inputs and outputs ðInputs: single bit values, carry in ðOutputs: Sum, Carry vHardware features ðCreate a single-bit adder and chain together vSame hardware can be used for addition and subtraction with minor changes vDealing with overflow ðWhat happens if numbers are too big? Overview

21. Computer Organization 3.5 Half Adder 21 vCombinational logic circuits give us many useful devices. vOne of the simplest is the half adder, which finds the sum of two bits.

22. Computer Organization Half Adder 22 vAs we see, the sum can be found using the XOR operation and the carry using the AND operation.

23. Computer Organization Full adder 23 vWe can change our half adder into to a full adder by including gates for processing the carry bit.

24. Computer Organization 3.5 Full adder 24 vHow can we change the half adder shown below to make it a full adder?

25. Computer Organization Full adder 25 vHere’s our completed full adder.

26. Computer Organization 26 Full Adder vFull adder made of several half adders Half-adder

27. Computer Organization 27 Full Adder vHardware repetition simplifies hardware design ðA full adder can be made from two half adders (plus an OR gate).

28. Computer Organization 28 Full Adder vPutting it all together ðSingle-bit full adder ðCommon piece of computer hardware Block Diagram

29. Computer Organization 29 4-Bit Adder vChain single-bit adders together. C 1 1 1 0 A 0 1 0 1 B 0 1 1 1 S 1 1 0 0

30. Computer Organization 30 Negative Numbers – 2’s Complement. vSubtracting a number is the same as: 1.Perform 2’s complement 2.Perform addition vIf we can augment adder with 2’s complement hardware? 1 10 = 01 16 = 00000001 -1 10 = FF 16 = 11111111 128 10 = 80 16 = 10000000 -128 10 = 80 16 = 10000000

31. Computer Organization 31 4-bit Subtractor: E = 1 +1 Add A to B’ (one’s complement) plus 1 That is, add A to two’s complement of B D = A - B

32. Computer Organization 32 Adder- Subtractor Circuit

33. Computer Organization 33 Overflow in two’s complement addition vDefinition: When two values of the same signs are added: ðResult won’t fit in the number of bits provided ðResult has the opposite sign.

34. Computer Organization 34 10 1101 1010 -------- 0111 11 1110 1101 -------- 1011 01 0011 0110 -------- 1001 00 0010 0011 -------- 0101 00 0010 1100 -------- 1110 11 1110 0100 -------- 0010 OFL 235235 3 6 -7 -2 -3 -5 -3 -6 7 2 -4 -2 4 2 Addition cases and overflow

35. Computer Organization 35 Summary: Adder-Substractor vAddition and subtraction are fundamental to computer systems vKey – create a single bit adder/subtractor ðChain the single-bit hardware together to create bigger designs vThe approach is called ripple-carry addition ðCan be slow for large designs vOverflow is an important issue for computers ðProcessors often have hardware to detect overflow