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**CS 105 Digital Logic Design**

Chapter 4 Combinational Logic

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**Outline 4.1 Introduction. 4.2 Combinational Circuits.**

4.3 Analysis Procedure. 4.4 Design Procedure. 4.5 Binary Adder-Subtractor. 4.6 Decimal Adder. 4.7 Binary Multiplier. 4.9 Decoders. 4.10 Encoders. 4.11 Multiplexers.

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**Combinational Circuit**

4.1 Introduction (1-2) Logic circuits for digital systems may be combinational or sequential. Combinational Circuit Consists of logic gates whose outputs at any time are determined from only the present combination of inputs. Performs an operation that can be specified logically by a set of Boolean functions.

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**4.1 Introduction (2-2) Sequential Circuit**

Employs storage elements in addition to logic gates. Their outputs are a function of the inputs and the state of the storage elements. Because the state of the storage elements is a function of previous inputs, the outputs of a sequential circuit depend not only on present value of inputs, but also on past inputs.

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**Combinational circuits**

Input Variables Consists of: Logic Gates Output Variables Transforms input data into required output data. Combinational circuits n inputs m outputs . . Block diagram

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**Standard Combination Circuits**

4.2 Combinational Circuit (2-2) n input variables 2n binary input combinations. Each possible combination one possible combination output. Combinational circuit can be specified with truth table. Combinational circuit can be described by m Boolean functions. Each output function is expressed in terms of the n input variables. Standard Combination Circuits Adders, subtractors, comparators, decoders, encoders and multiplexers

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**4.3 Analysis Procedure (1-4)**

Determine the function that the circuit implements from a logic diagram. Circuit’s function can be determined by either Boolean function or truth table. Steps Make sure that it is combinational not sequential. No memory elements. No feedback path (feedback path: a connection from the output of one gate to the input of a second gate that forms part of the input to the first gate). Obtain Boolean function or the truth table.

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**4.3 Analysis Procedure (2-4)**

Boolean function

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**4.3 Analysis Procedure (4-4)**

Truth Table

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**4.4 Design Procedure (1-7) Steps State the problem.**

From the specifications of the circuit, determine the required number of inputs and outputs and assign a symbol to each. Derive the truth table that defines the required relationship between inputs and outputs. Obtain the simplified Boolean functions for each output as a function of the input variables. Draw the logic diagram and verify the correctness of the design

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**4.4 Design Procedure (2-7) Example**

Design a circuit that converts binary coded decimal (BCD) to the excess-3 code for the decimal digits. Inputs Outputs BCD (4 bits). 4 inputs. Symbols: A, B, C, D. Ex-3 (4 bits). 4 outputs. Symbols: w, x, y, z.

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4.4 Design Procedure (7-7) Logic Diagram

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**Binary Adder-Subtractor**

Is a combinational circuit that performs the arithmetic operations of addition and subtraction with binary numbers.

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**Elementary Operations**

4-5 Binary Adder-Subtractor (2-20) Half adder Is a combinational circuit that performs the addition of two bits. Elementary Operations 0 + 0 = 0 ; = 1 ; = 1 ; = 10 Truth Table two input variables x, y. two output variables. C (output carry), S (least significant bit of the sum).

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**4-5 Binary Adder-Subtractor (3-20)**

Half adder Simplified Boolean Function (Sum of Products) Logic Diagram (Sum of Products) S = x'y+xy' C = xy

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**Simplified Boolean Function (XOR and AND gates)**

4-5 Binary Adder-Subtractor (4-20) Half adder Simplified Boolean Function (XOR and AND gates) Logic Diagram (XOR and AND gates) S=xÅ y C = xy

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**Functional Block: Full-Adder**

4-5 Binary Adder-Subtractor (5-20) Functional Block: Full-Adder It is a combinational circuit that performs the arithmetic sum of three bits (two significant bits and previous carry). It is similar to a half adder, but includes a carry-in bit from lower stages. Two half adders can be employed to implement a full adder. Inputs & Outputs Three input bits: x, y : two significant bits Z : the carry bit from the previous lower significant bit. Two output variables: C (output carry), S (least significant bit in sum).

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**Functional Block: Full-Adder**

4-5 Binary Adder-Subtractor (6-20) Functional Block: Full-Adder Operations Z X 1 + Y + 0 + 1 C S 0 1 1 0 For a carry-in (Z) of , it is the same as the half-adder: For a carry- in (Z) of 1: Z 1 X + Y + 0 + 1 C S 0 1 1 0

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**Functional Block: Full-Adder**

19 4-5 Binary Adder-Subtractor (7-20) Functional Block: Full-Adder Truth Table

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**4-5 Binary Adder-Subtractor (8-20)**

Functional Block: Full-Adder Simplified Boolean Function (Sum of products) S = x'y'z + x'yz' + xy'z' + xyz C = xy + xz + yz

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**Functional Block: Full-Adder Logic Diagram (Sum of Products)**

4-5 Binary Adder-Subtractor (9-20) Functional Block: Full-Adder Logic Diagram (Sum of Products)

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**4-5 Binary Adder-Subtractor (10-20)**

Functional Block: Full-Adder Implementation of full adder with two half adders and an OR gate: S = zÅ (xÅ y) = z'(xy'+x‘y) + z(xy'+x'y)' = z‘xy' + z'x'y + z(xy+x‘y') = xy'z' + x'yz' + xyz + x'y'z C = z(xÅ y)+xy = z(xy'+x'y)+xy = xy'z + x'yz + xy

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**4-5 Binary Adder-Subtractor (11-20)**

Functional Block: Full-Adder Logic Diagram of full adder with two half adders and an OR gate

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**4-5 Binary Adder-Subtractor (12-20)**

24 4-5 Binary Adder-Subtractor (12-20) Binary Adder Is a digital circuit that produces the arithmetic sum of two binary numbers. Constructed with full adders connected in cascade. The output carry from each full adder connected to the input carry of the next full adder. An n-bit binary adder requires n full adders.

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**We need a four –bit adder**

25 4-5 Binary Adder-Subtractor (13-20) Binary Adder Design a combinational circuit that finds the sum of two binary numbers: A=1011, B=0011 Must be 0 We need a four –bit adder

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**4-5 Binary Adder-Subtractor (14-20)**

26 4-5 Binary Adder-Subtractor (14-20) Binary Adder Logic Diagram

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**4-5 Binary Adder-Subtractor (15-20)**

Binary Subtractor The subtraction of signed and unsigned binary numbers: A-B = A+(2’s complement of B) (as discussed in chapter 1) Note: This circuit is incomplete, it requires additional circuits to deal with all cases of signed numbers

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**For detecting an overflow**

4-5 Binary Adder-Subtractor (16-20) Binary Subtractor Logic Diagram For detecting an overflow

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**Binary Adder- Subtractor For detecting an overflow**

Logic Diagram For detecting an overflow

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**4-5 Binary Adder-Subtractor (19-20)**

Overflow An overflow occurs: When two numbers with n digits each are added and the sum is a number occupying n+1 digits. The storage is limited. Unsigned numbers Detected by output carry: C=0, no overflow . C=1 , overflow. Signed numbers Add two positive numbers and obtain a negative number. Add two negative numbers and obtain a positive number.

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**4-5 Binary Adder-Subtractor (20-20)**

Overflow Signed numbers Detected by comparing sign carry and output carry (V): V=0, no overflow . V=1 , overflow.

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