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**Boolean Algebra and Logic Simplification**

Chapter 4 Boolean Algebra and Logic Simplification

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**Boolean Operations and Expressions**

Boolean Addition (OR)

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**Boolean Multiplication (AND)**

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**Laws and Rules of Boolean Algebra**

Commutative Associative Distributive Rules

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**Figure 4--1 Application of commutative law of addition.**

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**Figure 4--2 Application of commutative law of multiplication.**

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**Figure 4--3 Application of associative law of addition**

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**Figure 4--4 Application of associative law of multiplication**

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**Figure 4--5 Application of distributive law**

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**Rules of Boolean Algebra**

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Figure RULE 1

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Figure RULE 2

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Figure RULE 3

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Figure RULE 4

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Figure RULE 5

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Figure RULE 6

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Figure RULE 7

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Figure RULE 8

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Figure RULE 9

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DeMorgan’s Theorem Figure Gate equivalencies and the corresponding truth tables that illustrate DeMorgan’s theorems. Notice the equality of the two output columns in each table. This shows that the equivalent gates perform the same logic function.

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**Boolean Expression for a Logic Circuit**

Figure A logic circuit showing the development of the Boolean expression for the output.

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**Constructing a Truth Table for a Logic Circuit**

Evaluating the expression and putting results in truth table format

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**Simplification Using Boolean Algebra**

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**Figure 4--17 Gate circuits for Example 4-8**

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**Standard Forms of Boolean Expressions**

Sum-of-Products (SOP) Form Product-of-Sum (POS) Form

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**Figure 4--18 Implementation of the SOP expression AB + BCD + AC.**

SOP Form Figure Implementation of the SOP expression AB + BCD + AC.

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Standard SOP Form

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**Binary Representation of Product Term**

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POS Form Figure Implementation of the POS expression (A + B)(B + C + D) (A + C).

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Standard POS Form

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**Binary Representation of Sum Term**

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**Converting Standard SOP to Standard POS**

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**Converting SOP to Truth Table**

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**Converting POS to Truth Table**

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**Determining Standard Expressions from Truth Table**

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**Figure 4--20 A 3-variable Karnaugh map showing product terms.**

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**Figure 4--21 A 4-variable Karnaugh map.**

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Figure Adjacent cells on a Karnaugh map are those that differ by only one variable. Arrows point between adjacent cells.

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**Figure 4--23 Example of mapping a standard SOP expression.**

Karnaugh Map SOP Minimization Figure Example of mapping a standard SOP expression.

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Figure 4--24

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Figure 4--25

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**Mapping Nonstandard SOP Expression**

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Figure 4--26

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Figure 4--27

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**Karnough Map Simplification of SOP Expressions**

Example Group the 1s in each Karnaugh maps

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Figure 4--29

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Figure Determine SOP Related Problem: add 1 in the lower right cell (1010) and determine the resulting SOP.

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Figure 4--31 Related Problem: For the Karnaugh map in Fig. 4-31(d), add 1 in the 0111 cell and determine the resulting SOP.

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**Mapping Directly from Truth Table**

Figure Example of mapping directly from a truth table to a Karnaugh map.

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**“Don’t Care” Conditions**

Figure Example of the use of “don’t care” conditions to simplify an expression.

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**Karnaugh Map POS Minimization**

Figure Example of mapping a standard POS expression.

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Example 4-30

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Figure 4--38

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Figure 4--39

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**Converting b/w POS and SOP Using Karnaugh Map**

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**Five-Variable Karnaugh Maps**

Figure A 5-variable Karnaugh map.

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**Figure 4--42 Illustration of groupings of 1s in adjacent cells of a 5-variable map.**

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Figure 4--43

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**Figure 4--44 Basic structure of a PAL.**

Programmable Logic Figure Basic structure of a PAL.

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**Figure 4--45 PAL implementation of a sum-of-products expression.**

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**Digital System Application**

Figure Seven-segment display format showing arrangement of segments.

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**Figure 4--52 Display of decimal digits with a 7-segment device.**

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**Figure 4--53 Arrangements of 7-segment LED displays.**

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**Figure 4--55 Block diagram of 7-segment logic and display.**

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**Figure 4--56 Karnaugh map minimization of the segment-a logic expression.**

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**Figure 4--57 The minimum logic implementation for segment a of the 7-segment display.**

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