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**Abdullah Said Alkalbani alklbany@hotmail.com University of Buraimi**

ECEN Digital Logic Design Lecture 9 Combinational Circuits Binary Adders and Subtractors Abdullah Said Alkalbani University of Buraimi

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**Addition and subtraction of binary data is fundamental **

Overview Addition and subtraction of binary data is fundamental Need to determine hardware implementation Represent inputs and outputs Inputs: single bit values, carry in Outputs: Sum, Carry Hardware features Create a single-bit adder and chain together Same hardware can be used for addition and subtraction with minor changes Dealing with overflow What happens if numbers are too big? credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

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**1 1 +1 +1 2 10 Half Adder Add two binary numbers 0 0 0 0 0 1 1 0**

A0 , B0 -> single bit inputs S0 -> single bit sum C1 -> carry out C A B S 1 Dec Binary 1 1 +1 +1 2 10

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**Multiple-bit Addition**

Consider single-bit adder for each bit position. A3 A2 A1 A0 A B3 B2 B1 B0 B Ai +Bi Ci Si Ci+1 A B 1 Each bit position creates a sum and carry

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**Si Full Adder Full adder includes carry in Ci**

Notice interesting pattern in Karnaugh map. Ci Ai Bi Si Ci+1 1 Ci AiBi 00 01 11 10 Si

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Full Adder Full adder includes carry in Ci Alternative to XOR implementation Ci Ai Bi Si Ci+1 Si = !Ci & !Ai & Bi # !Ci & Ai & !Bi # Ci & !Ai & !Bi # Ci & Ai & Bi

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Full Adder Reduce and/or representations into XORs Si = !Ci & !Ai & Bi # !Ci & Ai & !Bi # Ci & !Ai & !Bi # Ci & Ai & Bi Si = !Ci & (!Ai & Bi # Ai & !Bi) # Ci & (!Ai & !Bi # Ai & Bi) Si = !Ci & (Ai $ Bi) # Ci & !(Ai $ Bi) Si = Ci $ (Ai $ Bi)

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**Ci+1 Full Adder Now consider implementation of carry out**

Two outputs per full adder bit (Ci+1, Si) Ci Ai Bi Si Ci+1 1 Ci AiBi 00 01 11 10 Ci+1 Note: 3 inputs

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**Ci+1 Full Adder Now consider implementation of carry out**

Minimize circuit for carry out - Ci+1 Ci Ai Bi Si Ci+1 Ci AiBi 00 01 11 10 1 Ci+1 Ci+1 = Ai & Bi # Ci & Bi # Ci & Ai

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**Recall: Full Adder Ci+1 = Ai & Bi # Ci !Ai & Bi # Ci & Ai & !Bi**

# Ci & (!Ai & Bi # Ai & !Bi) Ci+1 = Ai & Bi # Ci & (Ai $ Bi) Recall: Si = Ci $ (Ai $ Bi) Ci+1 = Ai & Bi # Ci & (Ai $ Bi)

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**Half-adder Full Adder Full adder made of several half adders**

Si = Ci $ (Ai $ Bi) Ci+1 = Ai & Bi # Ci & (Ai $ Bi) Half-adder

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**A full adder can be made from two half adders (plus an OR gate).**

Hardware repetition simplifies hardware design A full adder can be made from two half adders (plus an OR gate).

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**Putting it all together**

Full Adder Putting it all together Single-bit full adder Common piece of computer hardware Block Diagram

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4-Bit Adder Chain single-bit adders together. What does this do to delay? C A B S

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**Negative Numbers – 2’s Complement.**

Subtracting a number is the same as: Perform 2’s complement Perform addition If we can augment adder with 2’s complement hardware? 110 = 0116 = -110 = FF16 = 12810 = 8016 = = 8016 =

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**+1 4-bit Subtractor: E = 1 Add A to B’ (one’s complement) plus 1**

That is, add A to two’s complement of B D = A - B

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**Adder- Subtractor Circuit**

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**Overflow in two’s complement addition**

Definition: When two values of the same signs are added: Result won’t fit in the number of bits provided Result has the opposite sign. Overflow? CN-1 BN-1 AN-1 Assumes an N-bit adder, with bit N-1 the MSB

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**Addition cases and overflow**

00 0010 0011 0101 01 0011 0110 1001 11 1110 1101 1011 10 1101 1010 0111 00 0010 1100 1110 11 1110 0100 0010 -3 -6 7 2 -4 -2 -2 4 2 2 3 5 3 6 -7 -2 -3 -5 OFL OFL

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**Addition and subtraction are fundamental to computer systems **

Summary Addition and subtraction are fundamental to computer systems Key – create a single bit adder/subtractor Chain the single-bit hardware together to create bigger designs The approach is call ripple-carry addition Can be slow for large designs Overflow is an important issue for computers Processors often have hardware to detect overflow Next time: encoders/decoder. credential: bring a computer die photo wafer : This can be an hidden slide. I just want to use this to do my own planning. I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20. Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.

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