1. Copyright © 2001 Stephen A. Edwards All rights reserved Busses  Wires sometimes used as shared communication medium  Think “party-line telephone”  Bus drivers may elect to set the value on a wire or let some other driver set that value  Electrically disastrous if two drivers “fight” over the value on the bus

2. Copyright © 2001 Stephen A. Edwards All rights reserved Implementing Busses  Basic trick is to use a “tri-state” driver  Data input and output enable OE D Q Shared bus  When driver wants to send values on the bus, OE = 1 and D contains the data  When driver wants to listen and let some other driver set the value, OE = 0 and Q returns the value

3. Copyright © 2001 Stephen A. Edwards All rights reserved Four-Valued Simulation  Wires in digital logic often modeled with four values 0, 1, X, Z  X represents an unknown state State of a latch or flip-flop when circuit powers up Result of two gates trying to drive wire to 0 and 1 simultaneously Output of flip-flop when setup or hold time violated Output of a gate reading an “X” or “Z”  Z represents an undriven state Value on a shared bus when no driver is output- enabled

4. Copyright © 2001 Stephen A. Edwards All rights reserved Sequential Logic and Timing

5. Copyright © 2001 Stephen A. Edwards All rights reserved Introduction to Registers  Being just logic, ALUs require all the inputs to be present at once.  They have no memory. ALU AB FS

6. Copyright © 2001 Stephen A. Edwards All rights reserved Basic Computation  Computers perform complicated tasks only because the programmer has broken that task down into a sequence of simple primitive operations. Moving information Performing simple arithmetic and logical operations  To perform operations in sequence, the results of previous operations must be remembered somehow.

7. Copyright © 2001 Stephen A. Edwards All rights reserved Using Memory  Even the simplest computations require memory.  For example, take a pocket calculator. To add 4 and 3: Press ‘4’ – calculator remembers the number Press ‘+’ – calculator remembers ‘4’ and ‘add’ Press ‘3’ – calculator remembers ‘4’, ‘add’ and ‘3’ Press ‘=’ – calculator works out the answer and remembers it so it can be displayed  To achieve this kind of functionality, we need a circuit that can remember binary numbers – a register.

8. Copyright © 2001 Stephen A. Edwards All rights reserved Memory Circuits  Simple memory circuit can be built using a pair of NOR gates: If the SET input is high, the output goes high If the RESET input is high, the output goes low If neither input is high, the output stays in its previous state

9. Copyright © 2001 Stephen A. Edwards All rights reserved How it Works 0 0 (1) (0) (1) 0 0 1 (0) (1) (0) 1 0 0 (1) (0) 1 1 0 (1) (0) (1) 0 NB. Output of NOR gate = 1 only if both inputs are 0

10. Copyright © 2001 Stephen A. Edwards All rights reserved Flip-Flops  The R-S flip-flop is an asynchronous flip-flop. Its output changes immediately in response to an input.  Synchronous flip-flops only respond when they are ‘clocked’ by a separate clock-in.  Synchronous devices are preferred in computer design to avoid problems with unpredictable propagation delays.  Simplest synchronous flip-flop is probably the D-type flip-flop.  It is also the basis of a single-bit memory register.

11. Copyright © 2001 Stephen A. Edwards All rights reserved The Flip-Flop. A Single Bit Register. CLK D QQQQ DnDn Q n+1 001 110 D CLK Q

12. Copyright © 2001 Stephen A. Edwards All rights reserved A Two-bit Register CLK D QQQQ D QQQQ D0D0 D1D1 Q0Q0 Q1Q1 D 0 D 1 CLK Q 0 Q 1

13. Copyright © 2001 Stephen A. Edwards All rights reserved Multiple Bit Register  To remember a whole byte, just use eight flip-flops… CLK D Q CLK D Q CLK D Q CLK D Q CLK D Q CLK D Q CLK D Q CLK D Q D 0 D 1 D 2 D 3 D 4 D 5 D 6 D 7 Q 0 Q 1 Q 2 Q 3 Q 4 Q 5 Q 6 Q 7 CLK D 0-7 Q 0-7 D 0-7 Q 0-7 CLK 88 (shorthand form)

14. Copyright © 2001 Stephen A. Edwards All rights reserved The ‘Working Register’  The most common use of a register in a micro- controller is in conjunction with an ALU.  To simplify the inputs, one of the operands of any ALU operation is stored in a register.  Depending on the device, this register is known as: The Working Register (W) The Accumulator (A)

15. Copyright © 2001 Stephen A. Edwards All rights reserved Using a Working Register

16. Copyright © 2001 Stephen A. Edwards All rights reserved Example Operation  To subtract 3 from 5… Stage 1  Store the number 3 in the working register  Ignore the ALU output Stage 2  Input the number 5 and the selection word, S, representing (A – B)  ALU output equals 2 ALU A B S C OUT F Single input byte Control inputs Result Carry output Working register D Q CLK 8 8

17. Copyright © 2001 Stephen A. Edwards All rights reserved Are registers the same as memory ?  Yes Computer memory (RAM) is, effectively, a big bank of registers. In the PIC microcontrollers, the registers are the memory.  No Memory is usually physically separate from the microprocessor. Most microprocessors have only a few registers. Registers can be read from and written to very quickly. Register contents can be exchanged directly.

18. Copyright © 2001 Stephen A. Edwards All rights reserved Interconnecting Registers  How do we transfer information between two registers ? Like this ? CLK D 0-7 Q 0-7 CLK1 88 CLK D 0-7 Q 0-7 88 CLK2

19. Copyright © 2001 Stephen A. Edwards All rights reserved Three Registers  OK, that sort of works, what about 3 registers ? CLK D 0-7 Q 0-7 88 CLK D 0-7 Q 0-7 88 CLK D 0-7 Q 0-7 88 Don’t try to make sense of this. It’s an utter mess !

20. Copyright © 2001 Stephen A. Edwards All rights reserved Three Registers Mk II CLK D 0-7 Q 0-7 CLK1 88 CLK D 0-7 Q 0-7 CLK2 88 CLK D 0-7 Q 0-7 CLK3 88 8

21. Copyright © 2001 Stephen A. Edwards All rights reserved Interconnecting Registers  All registers are connected to a common set of 8 wires – a bus.  Each register needs a ‘switch’ to determine whether the bus is connected to: The register output  Register is outputting to the bus The register input  Register is inputting from the bus or…  … register is ignoring the bus  Using this basic scheme, any number of registers can be connected to the bus with no increase in complexity.

22. Copyright © 2001 Stephen A. Edwards All rights reserved Summary – ALUs and Registers  ALUs, despite their complexity, they are just combinational logic circuits with no memory.  Registers are fast access memory elements found inside microprocessors, micro-controllers etc.  Registers and their interconnections will be be discussed in more detail next time.

23. Copyright © 2001 Stephen A. Edwards All rights reserved Sequential Logic  Simply computing functions usually not enough  Want more time-varying behavior  Common model: combinational logic with state- holding elements Combinational logic InputsOutputs State-holding elements Clock Input

24. Copyright © 2001 Stephen A. Edwards All rights reserved State Machines  Common use of state-holding elements  Idea: machine may go to a new state in each cycle  Output and next state dependent on present state  E.g., a four-counter C’ / 0 C / 1 C’ / 1 C’ / 2 C / 2 C / 3 C’ / 3 C / 0

25. Copyright © 2001 Stephen A. Edwards All rights reserved Latches & Flip-Flops  Two common types of state-holding elements  Latch Level-sensitive Transparent when clock is high Holds last value when clock is low Cheap to implement Somewhat unwieldy to design with  Flip-flop Edge-sensitive Always holds value New value sampled when clock transitions from 0 to 1 More costly to implement Much easier to design with

26. Copyright © 2001 Stephen A. Edwards All rights reserved Latches & Flip-Flops  Timing diagrams for the two common types: Clk DQ DQ D Latch Flip- Flop

27. Copyright © 2001 Stephen A. Edwards All rights reserved RAMs  Another type of state-holding element  Addressable memory  Good for storing data like a von Neumann program Data In Address Read Write Data Out

28. Copyright © 2001 Stephen A. Edwards All rights reserved RAMs  Write cycle Present Address, data to be written Raise and lower write input  Read cycle Present Address Raise read Contents of address appears on data out Data In Address Read Write Data Out

29. Copyright © 2001 Stephen A. Edwards All rights reserved Setup & Hold Times  Flip-flops and latches have two types of timing requirements:  Setup time D input must be stable some time before the clock arrives  Hold time D input must remain stable some time after the clock has arrived

30. Copyright © 2001 Stephen A. Edwards All rights reserved Setup & Hold Times  For a flip-flop (edge-sensitive) D Clk Setup time: D must not change here Hold time: D must not change here

31. Copyright © 2001 Stephen A. Edwards All rights reserved Synchronous System Timing  Budgeting time in a typical synchronous design Clock period Clock skew Clk to D delay Slowest logical path Setup Time Clock skew

32. Copyright © 2001 Stephen A. Edwards All rights reserved Typical System Architecture  Most large digital systems consist of  Datapath Arithmetic units (adders, multipliers) Data-steering (multiplexers)  Memory Places to store data across clock cycles Memories, register files, etc.  Control Interacting finite state machines Direct how the data moves through the datapath

33. Copyright © 2001 Stephen A. Edwards All rights reserved Typical System Architecture  Primitive datapath plus controller RegistersMemory Controller Shared Bus Read/Write Addr. Reg. Latch Operation Result