1. RF Power improvement of AlGaN/GaN based HFETs and MOSHFETs
Fox, M. Marso
CWRF2008 CERN
1 I will show a few steps to improv the power performans of AlGaN/GaN based HFETs and MOSHFETs by means of rf characterization and device modelling

2. Research Center Juelich?
Where:
between Cologne>>>>>Aachen
areas of research :
M aterial
E nvironment
I nformation
L ife
E nergie
Established more than 50 years
2 First let ma indroduce our Research Center

3. simulated and measured
Outline
introduction
Measurements
simulated and measured
RF-power performance
Comparison of
Conclusion
S-Parameter
RF-power
Load-Pull
RF-power Simulation
Modelling
DC-, S-parameter
analysis
Load-Pull
Simulation 3
the outline of my talk is given by this structure
After a short introduction
Starts with mesurements for sparameter and for rf power by means of the loadpull system.
Steps for Rf power simulation are: modeling, dc- and s-parameter analysis and load-pull simulation..
to verify the measured results

4. Application example
4 due to Material properties wich i will show later AlGaN Material is a good candidate for high power and high temperature applications
AlGaN based HFETs are used in Amplifier systems ...as shown here .... for example in wireless base stations as power Transistor in the output- amplifier stage.
Efficiency
AlGaN/GaN HFETs are used in rf-generators, telecommunication and other applications where power devices at higher frequencies, voltages and temperatures are needed.

5. AlGaN/GaN Heterostructure and 2DEG
Ohmic
contact G
Schottky
contact D
Ohmic
contact
heterostructure is the layer system with different band gap material e.g. with AlGaN grown on GaN.
This 2DEG “charge plate” creates the area with very high mobility and sheet concentration of carriers
the Heterostructure is formed by 2 layers with different band gap energie e.g. AlGaN is grown on GaN
a 2 DEG will be established. It acts like a chrge plate and creates the area with high mobility and high sheet carrier concentration. Source and drain are ohmic contcts and will be controlled by the Schottky Gate. We allso call this Transistor HEMT.
High Electron Mobility Transistor
Ohmic contacts are controlled by the Schottky Gate conntact
Formation of 2DEG in AlGaN/GaN heterostructure

6. How to improve power performance
Example I-V characteristic
Imax
Max. output power: f(Ids,Vds)
Pout= Imax* (Vbreakdown-Vknee ) /8
ClassA operating point
Imax increases due to increase carrier density and velocity
Vbreakdown increases e.g.
-with fieldplate technology
-wide bandgap
Vknee
Vbreakdown
6 The maximum Outputpower obtainable by a device in Class A operation with full gate modulation is defined by I-V charachteristic of Ids,Uds
The maximum output Voltage and current swings give output power for a sinusoidal input of: Pout= (Imax* Vbreakdown-Vsaturation) /8
Imax is the value of Ids corresponding to a forward gate bias. The optimum Load resistance : RL= (Vb-Vs)/Imax Large values of Imax obtained by placing in parallel a number of hemt cells to give a large total gate width. The number of gats put in parallel is limited by the minimum load resistance which can be presented by the device RL The breakdown voltage is determined principally by the avalanche breakdown of the gate to drain diode. This are related by the equation
Opt. RL=(Vb-Vs)/Imax
for increasing Pout an output voltage- and current increase is needed

7. Theory of HFETs: DC behavior
How do the DC measures translate into device geometry and material properties?
Drain Current (Ids)
Transconductance (gm)
absolute charge underneath the gate equals charge in active region of 2DEG: h W LG qn
0r Id
insertion of expression into saturated current formula...
...yields:
7 i`l give a few hints of the DC behavior from the IV characteristic
Up to the suturation the current is depending from carier concentration, mobility, W and e-field
e_: q=1,602x10^-19C [As]
N= number of electrons
Mobility
Vds/dds= elektr field
Vs=saturation velocity Vd
differentiation yields intrinsic transconductance
the formulas tell us to:
charge carrier concentration 
mobility, velocity 
(robertson2001a)

8. Advanced Material Properties
Important for high output power:
- high breakdown field and voltage, i.e. wide bandgap
high thermal conductivity
Important for high fT and fmax :
Fast carriers (i.e. µ0, vpeak , vsat)
Frank Schwierz Fachgebiet Festkörperelektronik, Technische Universität Ilmenau, Germany
1.2
2.9
0.05
0.5
1.3
k, W/cm-K
1.5-2 2
0.7
0.8 1
vsat, 107cm/s
2.5
2.5-3
vpeak, 107cm/s
680
340
610
7000
4700
710
m0, cm2/Vs 40 30 33 4
6.4
5.7
EBR, 105 V/cm
3.4 3
3.2
1.4
1.1
EG, eV
GaN
6H SiC
4H SiC
InGaAs*
GaAs Si
8 Show a comparition of the material properties of the interested Materials
For high Ud: EG: band gap energie Ebr Breakdown voltage
For Id: Mobility Peakvelocety saturation velocity
Even mobility is´nt high the performance of GaN based devices gives the best resultssince n is 10x higher
heat transport: Temperatur coefficient
essential for power devices

9. HFET performance improvement
degradation of dc and
transport properties due to
long S_D distance
*Juraj Bernat „Fabrication and characterisation of AlGaN HEMT“ (Diss Aachen)
9 how to improve the performance
To increase the Output voltage one could enlarge the S-D distance but tis is limited due to change of the field distribution between Gate and Drain and yields in dc degradation
Enlarging of the Source - Drain distance is limited

10. HFET performance improvement
Fieldplate technology:
 Known since 1969 on Si
 Higher breakdown voltage
 Different electric field distribution between Gate and Drain
*Juraj Bernat „Fabrication and characterisation of AlGaN HEMT“ (Diss Aachen)
10 Implement the fieldplate technologie Is known since 1969 on Si. This will give a higher breakdown Voltage and an better field distribution between Gate and Drain.
Performance improved by Fieldplate technology on AlGaN-HEMT

11. Fieldplate Technology - Results
Simulation: by ATLAS, Silvaco
Confirmed by: A. Koudymov, IEEE Electr. Device L. 26, Oct. 2005
11 Field simulations are done with a sim Program ATLAS from Silvaco.
the simulation Results shown in the diagramm of electric field via the source drain distance
With field plate implementation reduced elektric field peaks are shown.
Increase of breakdown voltage in undoped structures. Breakdown of the doped structure was not changed what implies that breakdown is caused by doped AlGaN layer. Increase of the output power is due to modification of the electric field on the GaN cap surface and therefore reduction of CC.
*Juraj Bernat „Fabrication and characterisation of AlGaN HEMT“ (Diss Aachen)
Increase of the output power is due to modification of the electric field on GaN cap

12. Experiment
Simultaneous fabrication of unpassivated & passivated SiC/GaN/AlGaN HFETs and MOSHFETs:
10 nm SiO2 layer for passivated HFETs and MOSHFETs (PECVD),
LG= µm, LW =200 µm (2-fingers),
Gero Heidelberger:
Technology related issues regarding fabrication
SiO2 ~10 nm
SiO2 ~10 nm
Source
Drain
Gate S D G
30 nm Al0.28Ga0.72N
3 µm GaN
13 Intreducing the experiment the different HEMT structors
our AlGaN HFET structure were prepared by low pressure mettallorganic chemical vapordeposition on SiC and standard device processing. …as shown here with S G D metallization For the HFET.
Passivation is done by plasma enhanced chemical vapor deposition with silicon oxide thickness of 10nm
Additionaly dielectric layer underneath the Gate coming to Metall-oxide-semiconductor-hetero field-effect-transistor with 10nm oxide thickness deposited by PECVD prozess
LG ….Gate with
4H-SiC
Unpassiv. HFET
passivated
HFET
MOS
HFET

13. Fabrication of our HFET Devices
HFET- technology
Mesa etching
ECR RIE or Ar+ sputter
Depth: 250 ~ 300 nm
Ohmic contacts
Ti/Al/Ni/Au
Annealing: 850ºC, 30sec
Schottky contacts
Ni/Au
Pads
Ti/Au
12 Our Hemt technologie are demonstrated here:
Mesa etching to isilate the HEMT cell from the other ciruits on the Wafer
Ohmic conntacts for Source and Drain Contacts,
The Pads to make the On wafer measurements with the apropreate Probe tips.
Passivation process with Plasma enhanced chemical vapor deposition.
Fabrication of our HFET Devices

14. Hetero Field Effect Transistor
HFET Layout
SEM picture of AlGaN/GaN HFET wg=200 µm
Lg=0.3 µm
SEM picture of AlGaN/GaN HFET with airbridge technology >> increasing Imax
14 This pictures show thw princible of our HEMT layout
The upper draw is a scanning electron microscop picture of a single HEMT Cell
With Source gate and drain metallazation. Source is grounded, Gate is Input, Drain will be output.
The double Gate is with is 2x100micrometer and the gatelength is 0.3 micro.
Thelower draw is a scanning electron microscop pcture of multible HEMT in parallel connected with airbridges.
This will increase the maximum output current wich i will show later on.
Detailed view of HFET Device as fabricated in our lab
prepared for on-wafer measurements with 100 µm pitch

15. simulated and measured
Outline
Measurements
simulated and measured
RF-power performance
Comparison of
S-Parameter
RF-power
Load-Pull
RF-power Simulation
Modelling
DC-, S-parameter
analysis
Load-Pull
Simulation
15 Sparameter measurement

16. S-parameter Measurement System
Important for microwave design and characterization
Basics for parameter extraction and simulation
Our measurement system:
Frequency up to 110 GHz
Network Analyzer
On wafer measurements
Control System and Calibration (LRM)
16 Next Slide and the Photogragh will show oure Measurement Setup for S- Parameter Measurements
s parameter measurements are important parameters in an microwave design.
Travelling waves are scattered or reflected at the terminal from the DUT
Sparameter measurements are performed with networkanalyzer up to 110 GHz on wafer measuremnt system.

17. 110 GHz Measurement System
HP8510XF NWA-System:
-Network Analyser HP8510C
- RF source 45 MHz 50GHz
Synth. sweeper HP 83651
-LO source 45MHz to 20GHz
Synth. Sweeper HP 83621
-mm-wave controller
-Cascade probestation
-Connectors: 1 mm coaxial
-Coplanar Probetips 110 GHz
-LRM Calibration , attanuation
DUT
mm-wave controller
mm-wave controller
17 The 110 Ghz Measurement system consists of: network analyzer Agilent HP 8510 C ,Bias supply, Probe station for On-wafer Measurements , Coplanar probetips, Mixer, Controller and Directinalcoupler are situated on the 3Dimensionel Tabel next to the DUT to avoid rf loses.
FZ-Jülich, ISG1, A. Fox
We are well prepared for high quality s-parameter measurements

18. Results of S-parameter measurements
drain source voltage: 20V
gate length: nm
SiO2 layer thickness: 10nm
cut off frequency (ft) is the frequency where current gain h21=0 [db]
18 measurement results presented in diagramm with current gain H21 vs. Frequency
Drain source voltage 20V lg 500nm sio2 layer 10nm
The cutoff frequency is determined as zero gain value of current gain H21
For the Hfet we found cutoff frequency of 17 Ghz for MOSHFET increase to 24 GHz.
MOSHFETs show significantly higher cut off frequencies

19. Variation of ft vs. gate length
9 The cutoff frequency decreases for all types of devices with increasing gate length, as shown.
Higher cut-off frequencies (ft) are observed for MOSHFETs for all kinds of gate lengths. ft increases with decreasing gate lengths.

20. simulated and measured
Outline
Measurements
simulated and measured
RF-power performance
Comparison of
S-Parameter
RF-power
Load-Pull
RF-power Simulation
Modelling
DC-, S-parameter
analysis
Load-Pull
Simulation
20 Load pull mesurements

21. Load Pull Measurement System
RF-Power measurement
step attenuator
Microwave Tuner System
slotted coaxial line
computer controlled slug Tuner cal.
deembeding
Focus Microwave
Ref.plane
resonanz.
21 The Load pull measurement system consist of probestation to handle the probe for on wafer measurements. The input power is generated...
Load Pull Measurement System

22. RF-Power measurement system
Networkanalyzer
HP8510B
Bias supply
Source-tuner
Load-tuner
DUT
22 The picture shows our rf- power load pull mesurement system with network anlyzer ...in the rear for... calibration and deembeding.
The large signal measurements were performed on wafer... at 7 GHz.... under continuous wave condition ....using the Focus Microwave computer controlled tuners.... with mechanical airline..... and computer controlled stubs.
All measurements were made at room temperature.
The source and load reflections GS and GL were optimized .....for maximum output power.
Large signal measurements are performed with a load- and source- pull measurement system to match input and output impedances of the device to achieve maximum output power.
The input-side tuner allows the source match to be "pulled" to an impedance where the device has appreciable gain, then it is generally left at this fixed impedance for all measurements on a device at a fixed frequency. The output-side tuner is the one that gets a work-out!
FZ-Jülich, ISG1, A. Fox
Large signal measurements were performed on wafer at 7 GHz by source and load pull measurements

23. Load pull measurement
23 Measurement results Pout, Gain and PAE for passivated HFET with differend Outputvoltage
Power performance will increase with further increase of Vds
for passivated HFET

24. Power measurement at differend SiO2layer
Comparison of Pout for HFET and MOSHFET with different SiO2 dielectric layer
@ 7 GHz
24 Fig shows the comparison of output power for HFET and MOSHFET with different dielectric layer thicknesses vs. input power.
measured at 7 GHz. The maximum output power is found with a dielectric thickness of 5 nm.
Performance improvement by optimising the dielectric layer thickness

25. Comparison of Power measurements
SiO2 layer thickness: 10nm
WG = 200 µm , LG = 0.7 µm
f = 7 GHz
Vg = -2.5 V HFET
Vg = -2.5 V passiv. HFET
Vg = -7 V MOSHFET
25 The results of the Loadpull rf power mesurements are shown in RF output-power vs. Output-voltage.
Due to different Threshold voltage the best power out put results for MOSHFET was achieved with –7 V Inpputvoltage.
The RF output power increases from 2.9 W/mm (HFET) to
6.7 W/mm (MOSHFET) with no fieldplate implemented

26. simulated and measured
Outline
Measurements
simulated and measured
RF-power performance
Comparison of
S-Parameter
RF-power
Load-Pull
RF-power Simulation
Modelling
DC-, S-parameter
analysis
Load-Pull
Simulation
26 Modelling was done .....to investigate the intrinsic behavior of the device structure
Modelling allso generats the Simulation file wich is needed for power simulation

27. Equivalent circuit for the AlGaN/GaN MOSHFET
Modelling
Equivalent circuit for the AlGaN/GaN MOSHFET G D S
Oxyde
deplition
27 The physical structure shown here with source gate drain contact, the deplation layer and substrate and the dielectric layer underneath the gate.
 From this physical- structure one comes to the equivalent circuit with its extrinsic and intrinsic behavior.
Extrinsic parameters are independent from Working point. From cold measurements we get the extrinsic parameters
 We use this model to extract the extrinsic and intrinsic parameters from measured s-parameter by means of the extraction software Topas.
The Gate source capacitance, transconductance showed an significant change with dielectric layer underneath the gate as for the MOSHFET structure.
ft =f( gm/Cgs) S
Cgs and gm change with the dielectric layer

28. Extracted Parameters Cgs, gm
28 fig shows the input capacitance Cgs of the three devices, while the extracted high frequency transconductance is depicted in Fig.
Since the dielectric layer at the gate builds a additional series capacity the gate source capacitance is decreased compared to the HFET structure. Transconductance is also decreased at the MOSHFET.
With passivation the polarisation induced charge on the surface is reduced so that vsat is higher and so the gm increases
From theory:
vsat increases with passivation
Cgs decreases for MOSHFETs due to additional SiO2 layer

29. Comparison of gm/Cgs ratio
Modelling
Comparison of gm/Cgs ratio
ft =f( gm/Cgs)
29 The cutoff frequency relevant ratio gm to Cgs vs. the drain voltage is shown
The calculated values of ft from the ratio gm/Cgs are in agreement with the increase of cutoff frequency for the MOSHFET compared to unpassivated and passivated HFET from h21
gm/Cgs is in agreement with the increase of cut off frequency from h21 for the MOSHFET compared to HFET

30. Comparison of measurements and model
Modelling
Comparison of measurements and model
S21
S11
MOSHFET
Vg=-1V
Vds=19V
Frequency: 2 to 50GHz
S12
S22
Measurement: blue curves
Model: red curves
30 Extracted modell is verified by comparing the optimized and the measured Scattering -parameter.
A good agreement has been achieved as seen here in the charts of the 4 Sparameters
Parameterextraction done by TOPAS, IMST
Good agreement between measurement and optimized model

31. simulated and measured
Outline
Measurements
simulated and measured
RF-power performance
Comparison of
S-Parameter
RF-power
Load-Pull
RF-power Simulation
Modelling
DC-, S-parameter
analysis
Load-Pull
Simulation 31
By means of ADS Advanced Design System (Agilent) the analysis of dc and sparameters are done to verify the calculated parameters for further simulations.

32. DC analysis DC design circuit DC simulator bias sweep DUT
DUT with the modeled parameters
DUT
32 Design circuit diagramm for Dc analysis is shown.
DUT includes all the extracted parameter from modelling.
The bias voltages for in- and output is sweeped over the desired range.
Dc simulator calculats the DC values shown in next slide:
Advanced Design System,
Agilent

33. DC analysis: Results
Transconductance
Output I-V- curves
Transfer I-V- curves
33 Output I-V- curves
Transfer I-V- curves
Transconductance are in good agreement to the measured DC results
The curves are comparable to DC-measurements and reflect the intrinsic behavior

34. S-parameter analysis S-parameter simulator S-parameter design circuit
frequency sweep
S-parameter design circuit
DUT
34 Ciruit diagramm for S parameter shown
includes the Input output Ports and Bias Supplies
DUT with the intrinsic and extrinsic parameters
Desired Frequency range is sweeped
S-parameter simulator calculates the Impeadances shown in next slide

35. S-parameter analysis Comparison of Transistor Scattering Parameters
Input S11 output S22
tranmited impeadance S21
Show a good agreement
measured: red curves
simulated: blue curves
different fitting at dif. biaspoints
needs further optimazation
@that working point

36. simulated and measured
Outline
Measurements
simulated and measured
RF-power performance
Comparison of
S-Parameter
RF-power
Load-Pull
RF-power Simulation
Modelling
DC-, S-parameter
analysis
Load-Pull
Simulation
36 Load pull simulation
Like the load pull measurement, the rf- power simulation first need a good impeadance match at in an output of the device.
A pair of tuners are used. The input-side tuner allows the source match to be "pulled" to an impedance where the device has appreciable gain, then it is generally left at this fixed impedance for all measurements on a device at a fixed frequency. The output-side tuner is the one that gets a work-out!

37. Biasing the device and running a simulation
Load-pull simulation
Specifying and generating desired load and source reflection coefficients (impedance)
Biasing the device and running a simulation
Calculating desired responses (delivered power, PAE, etc.)
37 Load pull Simulation
 with loadpull simulation specifying and generating desired load and source reflection coefficints for max Output power or for max PAE.

38. ? Load pull simulation Load- Pull design circuit
Harmonic-Balance-simulator
for nonlinear circuit behavior
DUT
ADS © Agilent ?
38 Simulation design circuit for Loadpul simulation
Finding best match
Load pull simulation varies the load reflection coefficient presented to a device...

39. Load pull simulation
39 Output Impeadance pattern shows best match for Poeut and for PAE
This data shows the simulation results when the reflection
coefficient is the value selected by the marker’s location.
…to find the optimal value to maximize power or PAE, etc.

40. Load pull simulation
Harmonic Balance simulator Input power sweep
Matched
Input impedance
Matched
Output impedance
DUT
40 Loadpull simulation circuit with Harmaonic balance simulator for non linear circuit simulations.
One tone sin wave generator and bias supply.
Sweep of Power input.
Results Pout and PAE to Compare with our Load pull measurements
Non linear circuit simulation results in Pout and PAE of the DUT

41. simulated and measured
Outline
Measurements
simulated and measured
RF-power performance
Comparison of
S-Parameter
RF-power
Load-Pull
RF-power Simulation
Modelling
DC-, S-parameter
analysis
Load-Pull
Simulation
41 Verification of the measured and simulated result by comparision of simulated and measured rf power performance

42. Comparison of simulated and measured PAE
MOSHFET,
SiO2 thickness: 10nm
42 comparing simulation and measurements of PAE.
The PAE shows slight deviations since it depends on input matching.
Curves are acceptable between measurement and simulation of PAE

43. Comparison of simulated and measured output power
MOSHFET,
SiO2 thickness: 10nm
43 comparing simulation and measurements of output power of the MOSHFET via the Pin
Good agreement between measurement and simulation of Pout

44. Increase of RF-performance by introduction of the MOSHFET-technology.
Conclusion
Increase of RF-performance by introduction of the MOSHFET-technology.
- MOS-HFET superior to unpassivated and passivated HFET regarding DC-, RF-, and power-performance.
Increase of output power, PAE and cut-off frequency.
Simulations verify the measured large signal results.
Further work: alternative dielectric material and additional fieldplate implementation
44 we reported an increase of RF- performance by introduction of the MOSHFET- technology.
This is demonstrated by the increase of cutoff frequency with the small signal behaviour and the increase of rf-output power with large signal performance.
The simulations are in accordance to the large signal measured results and are also confirmed by the S-parameter measurements.
Further investigation will be done with different dielectric materials underneath the gate.

45. CWRF2008
Thank you!

46. ENDE Vortrag

47. RF-Power measurement (Load-Pull )
Comparison of RF-Power performance for passivated HFET and MOSHFET
HFET
MOSHFET 14
Slides show Power measurement Results. Output power and gain vs. input power with differnt output voltage.
POUT increases with the drain-source voltage Vds.
As can be seen, maximum of Power Addet Efficiency is not at the highest outputvoltage as the max output power
In this case the measurements are optimised at max Poweroutput.
PAE=(Pout-Pin)/Pdc
MOSHFETs show significantly higher output Power and PAE

48. Load pull simulation Load-Pull design circuit Harmonic Balance
Input power sweep
matched source impedance
matched load
impedance
DUT 26
Loadpull simulation circuit with Harmaonic balance simulator for non linear circuit simulations.
One tone sin wave generator and bias supply.
Sweep of Power input.
Results Pout and PAE to Compare with our Load pull measurements
Non linear circuit simulation results in Pout and PAE of the DUT

49. Load pull simulation
DUT
Detail circuit of Load-Pull
design circuit

50. …to find the optimal value to maximize output-power
Load pull simulation
Load pull simulation varies the load reflection coefficient presented to a device...
…to find the optimal value to maximize output-power

51. From physical structure to equivalent circuit
Modeling
From physical structure to equivalent circuit
10 Modelling was done .....to investigat the intrinsic behaviour of the HEMT structure.
From the physical structure the model can be deveoped as seen...
The equivalent curcuit results from the physical structure.
the channel capacitance is the depletion layer contribution to the total Cgs
Based on the well known 15 element equivalent curcuit the the intrinsic parameters were extracted by means of the extraction software Topas.
The eqc parameter Gate source capacitance, transconductance and source resistance showed an significant change with doping density.
Rs decreases from 4.9 Ohm for undoped to 3.9 for highly doped devices respectively.
The variation of doping concentration influences the gate channel capacitance which is the depletion layer contribution to the total gate source capacitance.

52. CV-measurement

53. Modeling
Comparision of measured and simulated S-Parameter
S12
S11
S22

54. increased output power by increasing Id and Ud
To reach maximum Pout:
High Idsat
High Vbr
Small Vknee  Small Rs
increased output power by increasing Id and Ud

55. Reduction of Gate Leakage Current
MOSHFET using 11nm thick SiO2 gate isolation:
30% increase of the drain saturation current
Reduction of gate leakage current from 10-6 to A/mm
*Juraj Bernat „Fabrication and characterisation of AlGaN HEMT“ (Diss Aachen)

56. Wide bandgap semiconductors
Common semiconductors
EG around 1 eV
Si EG = 1.1 eV
GaAs EG = 1.4 eV
Wide bandgap semiconductors
EG > 2 eV
4H SiC EG = 3.2 eV
6H SiC EG = 3.0 eV
GaN EG = 3.4 eV
AlN EG = 6.1 eV
AlGaN EG = eV
C EG = 5.5 eV
Narrow bandgap semiconductors
EG << 1 eV
InAs EG = 0.35 eV
InSb EG = 0.17 eV

57. SiC and GaN based Transistors
Cree, Inc : Pout= 32.2 W/mm, PAE= 54,8%, Fe_doped and Field plate
GaN Pout=4.1W/mm, PAE=72%

58. Heterostructure and 2DEG
A heterostructure is the layer system where two semiconductors with different band
gaps Eg are grown one on the other
In the thermodynamical equilibrium,when both semiconductors are "connected" together, the Fermi-level energy (EF ) of the Semiconductor I and Semiconductor II must be in the line what cause the discontinuity in the conductance (EC) and valence (EV ) band and the band bending. This results in the formation of the triangular quantum well where carriers are fixed in one axis and the 2DEG is formed.