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High Efficiency Microwave Amplifiers and SiC Varactors Optimized for Dynamic Load Modulation C HRISTER A NDERSSON Microwave Electronics Laboratory Department.

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Presentation on theme: "High Efficiency Microwave Amplifiers and SiC Varactors Optimized for Dynamic Load Modulation C HRISTER A NDERSSON Microwave Electronics Laboratory Department."— Presentation transcript:

1 High Efficiency Microwave Amplifiers and SiC Varactors Optimized for Dynamic Load Modulation C HRISTER A NDERSSON Microwave Electronics Laboratory Department of Microtechnology and Nanoscience – MC2 May 23, 2013 C HRISTER A NDERSSON Microwave Electronics Laboratory Department of Microtechnology and Nanoscience – MC2 May 23, 2013

2 2 Thesis contributions  Theory and technology for energy efficient and high capacity wireless systems  Power amplifier analysis  Transistor technology and modeling  Wideband design [A]  Transmitter efficiency enhancement  Dynamic load modulation [B, C]  Active load modulation [D]  Varactors for microwave power applications  SiC varactors for DLM [E, F]  Nonlinear characterization [G]  Theory and technology for energy efficient and high capacity wireless systems  Power amplifier analysis  Transistor technology and modeling  Wideband design [A]  Transmitter efficiency enhancement  Dynamic load modulation [B, C]  Active load modulation [D]  Varactors for microwave power applications  SiC varactors for DLM [E, F]  Nonlinear characterization [G]

3 POWER AMPLIFIER ANALYSIS

4 4 Transistor technology  GaN HEMT  High R opt and high X Cds /R opt ratio  Ideal choice for wideband high power amplifiers  GaN HEMT  High R opt and high X Cds /R opt ratio  Ideal choice for wideband high power amplifiers Fano limit: Baredie 15-W GaN HEMT (Cree, Inc.) Simplified model:

5 5 Resistive harmonic loading [A] Z L (f) = R opt P out = class-B η = 58% Dimensions: 122 mm x 82 mm.

6 6 Measurements [A]  Decade bandwidth performance (0.4 – 4.1 GHz)  Pout > 10 W  η = 40 – 60%  DPD linearized to standard  ACRL < –45 dBc  Envelope tracking candidate  Decade bandwidth performance (0.4 – 4.1 GHz)  Pout > 10 W  η = 40 – 60%  DPD linearized to standard  ACRL < –45 dBc  Envelope tracking candidate

7 TRANSMITTER EFFICIENCY ENHANCEMENT Dynamic and active load modulation

8 8 Dynamic load modulation (DLM) [B,C]  Load modulation  Restore voltage swing and efficiency  Varactor-based DLM  Reconfigure load network at signal rate  Load modulation  Restore voltage swing and efficiency  Varactor-based DLM  Reconfigure load network at signal rate

9 9 Class-J DLM theory [B]  DLM by load reactance modulation  Ideal for varactor implementation  Theory enables analysis  Technology requirements  Power scaling [B] → [C]  Frequency reconfigurability  DLM by load reactance modulation  Ideal for varactor implementation  Theory enables analysis  Technology requirements  Power scaling [B] → [C]  Frequency reconfigurability

10 10 10-W demonstrator @ 2.14 GHz [B]  3-mm GaN HEMT + 2x SiC varactors  Efficiency enhancement: 20% → 45% @ 8 dB OPBO  3-mm GaN HEMT + 2x SiC varactors  Efficiency enhancement: 20% → 45% @ 8 dB OPBO CuW-carrier dimensions: 35 mm x 20 mm.

11 11 100-W demonstrator @ 2.14 GHz [C]  Fully packaged  24-mm GaN HEMT + 4x SiC varactors  Record DLM output power (1 order of mag.)  Efficiency enhancement: 10-15% units @ 6 dB  DPD by vector switched GMP model  17-W WCDMA signal, η = 34%, ACLR < –46 dBc  Fully packaged  24-mm GaN HEMT + 4x SiC varactors  Record DLM output power (1 order of mag.)  Efficiency enhancement: 10-15% units @ 6 dB  DPD by vector switched GMP model  17-W WCDMA signal, η = 34%, ACLR < –46 dBc Package internal dimensions: 40 mm x 10 mm. 40V 30V 20V

12 12 Active load modulation [D]  Mutual load modulation using transistors  Both transistors must operate efficiently  Co-design of MN 1, MN 2, and current control functions Successful examples: Doherty and Chireix  Modulate current amplitudes and phase at signal rate  Mutual load modulation using transistors  Both transistors must operate efficiently  Co-design of MN 1, MN 2, and current control functions Successful examples: Doherty and Chireix  Modulate current amplitudes and phase at signal rate β1β1 β 2, φ

13 13 Dual-RF input topology [D]  Complex design space – many parameters  Linear multi-harmonic calculations (MATLAB)  Include transistor parasitics  No assumption of short-circuited higher harmonics  Optimize for wideband high average efficiency Output: circuit values + optimum current control(s)  Complex design space – many parameters  Linear multi-harmonic calculations (MATLAB)  Include transistor parasitics  No assumption of short-circuited higher harmonics  Optimize for wideband high average efficiency Output: circuit values + optimum current control(s) β1β1 β 2, φ

14 14 Verification of calculations [D]  2 x 15-W GaN HEMT design  Straightforward ADS implementation – plug in MATLAB circuit values  Parasitics and higher harmonics catered for already  Good agreement with complete nonlinear PA simulation  2 x 15-W GaN HEMT design  Straightforward ADS implementation – plug in MATLAB circuit values  Parasitics and higher harmonics catered for already  Good agreement with complete nonlinear PA simulation WCDMA 6.7 dB PAPR (MATLAB) (ADS)

15 15 Measurements [D]  Performance over 100% fractional bandwidth (1.0 – 3.1 GHz)  P max = 44 ± 0.9 dBm  PAE @ 6 dB OPBO > 45%  Record efficiency bandwidth for load modulated PA  Performance over 100% fractional bandwidth (1.0 – 3.1 GHz)  P max = 44 ± 0.9 dBm  PAE @ 6 dB OPBO > 45%  Record efficiency bandwidth for load modulated PA Dimensions: 166 mm x 81 mm.

16 VARACTORS FOR MICROWAVE POWER APPLICATIONS 14-finger SiC varactor (C min = 3 pF). Chalmers MC2 cleanroom. Varactor-based DLM architecture.

17 17 Varactor effective tuning range  Increasing RF swing decreasing T eff  Shape of varactor C(V) matters  Nonlinear characterization [G]  Engineer C(V) to be less abrupt  Increasing RF swing decreasing T eff  Shape of varactor C(V) matters  Nonlinear characterization [G]  Engineer C(V) to be less abrupt

18 18 Schottky diode SiC varactors [E,F]  SiC varactor performance [E,F]  Moderate small-signal tuning range  High breakdown voltage  High Q-factor  Highest tuning range when |RF| > 5 V  Used in [B,C,d,g,h]  SiC varactor performance [E,F]  Moderate small-signal tuning range  High breakdown voltage  High Q-factor  Highest tuning range when |RF| > 5 V  Used in [B,C,d,g,h]  Engineer doping profile  Higher doping Lower loss Higher electric fields  Wide bandgap SiC  High critical electric field  Engineer doping profile  Higher doping Lower loss Higher electric fields  Wide bandgap SiC  High critical electric field

19 19 Conclusions  Energy efficient wideband power amplifiers  Simplified modeling (X Cds /R opt )  Resistive harmonic loading [A]  Varactor-based dynamic load modulation [B,C]  Active load modulation [D]  Varactors for microwave power applications  Nonlinear characterization [G]  Novel SiC varactor [E,F] Dynamic load modulation one of many applications  Theory and technology for energy efficient high capacity wireless systems  Energy efficient wideband power amplifiers  Simplified modeling (X Cds /R opt )  Resistive harmonic loading [A]  Varactor-based dynamic load modulation [B,C]  Active load modulation [D]  Varactors for microwave power applications  Nonlinear characterization [G]  Novel SiC varactor [E,F] Dynamic load modulation one of many applications  Theory and technology for energy efficient high capacity wireless systems

20 20 Acknowledgment ”Microwave Wide Bandgap Technology project” ”Advanced III-Nitrides-based electronics for future microwave communication and sensing systems” ”ACC” and ”EMIT” within the GigaHertz Centre This work has been performed as part of several projects:

21 21

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23 23 Power amplifiers (PA)  Final stage amplifier before antenna  High power level → efficiency ( η ) critical  PA internals  FET  Input matching network  Load matching network  Nonlinear circuit  Propose simplifications to allow linear analysis  These are used in [A-D]  Final stage amplifier before antenna  High power level → efficiency ( η ) critical  PA internals  FET  Input matching network  Load matching network  Nonlinear circuit  Propose simplifications to allow linear analysis  These are used in [A-D]

24 24 Model simplifications [A-D]  Linear transistor (constant g m )  Load line in saturated region (no compression)  Class-B bias  Sinusoidal drive → half-wave rectified current  Bare-die parasitics mainly shunt-capacitive  Effective ”C ds ” found by load-pull  Linear transistor (constant g m )  Load line in saturated region (no compression)  Class-B bias  Sinusoidal drive → half-wave rectified current  Bare-die parasitics mainly shunt-capacitive  Effective ”C ds ” found by load-pull 15-W GaN HEMT (Cree, Inc.)

25 25 Power amplifiers (PA)  Final stage amplifier before antenna  High power level → efficiency most critical  Final stage amplifier before antenna  High power level → efficiency most critical

26 26 Typical PA  Transistor  Microwave frequency FET  Input network  Gate bias, stability, source impedances (current wave shaping)  Load network  Drain supply, load impedances (voltage wave shaping)  Transistor  Microwave frequency FET  Input network  Gate bias, stability, source impedances (current wave shaping)  Load network  Drain supply, load impedances (voltage wave shaping)

27 27 Transistor equivalent circuit  Complete model is complicated  Nonlinear voltage-controlled current source  Nonlinear capactiances  Feedback  Package parasitics  Propose simplifications to allow linear analysis  These are used in [A-D]  Complete model is complicated  Nonlinear voltage-controlled current source  Nonlinear capactiances  Feedback  Package parasitics  Propose simplifications to allow linear analysis  These are used in [A-D]

28 28 Comparison [A]

29 29 PA efficiency and modern signals  PA efficiency drops in output power back-off (OPBO)  Modern signals  High probability to operate in OPBO  Average efficiency is low  Need an architecture to restore the efficiency in OPBO  PA efficiency drops in output power back-off (OPBO)  Modern signals  High probability to operate in OPBO  Average efficiency is low  Need an architecture to restore the efficiency in OPBO

30 30 Dynamic load modulation (DLM)  PA efficiency drops in output power back-off (OPBO)  Load modulation  Restore voltage swing and efficiency  Varactor-based DLM  Reconfigure load network at signal rate  Linearization: RF input + baseband varactor voltage  PA efficiency drops in output power back-off (OPBO)  Load modulation  Restore voltage swing and efficiency  Varactor-based DLM  Reconfigure load network at signal rate  Linearization: RF input + baseband varactor voltage

31 31 Doherty-outphasing continuum [D]  Dual-RF input PA – optimum current control versus power & frequency  Classic Doherty impedances & short-circuited higher harmonics  Classic Doherty transmission line lengths not best choice Adding 90° includes outphasing operation and gives higher efficiencies  Dual-RF input PA – optimum current control versus power & frequency  Classic Doherty impedances & short-circuited higher harmonics  Classic Doherty transmission line lengths not best choice Adding 90° includes outphasing operation and gives higher efficiencies (class-B efficiency) WCDMA 6.7 dB PAPR

32 32 Reality check [D]  Realistic circuit  Cannot assume short-circuited higher harmonics  Must consider transistor parasitics  Complicated design space (not suitable for ADS)  Linear multi-harmonic calculations (MATLAB)  Assume simplified transistor model  Optimize circuit values Relatively cheap calculation Brute-force evaluation of 14M circuits vs. drive and frequency  Realistic circuit  Cannot assume short-circuited higher harmonics  Must consider transistor parasitics  Complicated design space (not suitable for ADS)  Linear multi-harmonic calculations (MATLAB)  Assume simplified transistor model  Optimize circuit values Relatively cheap calculation Brute-force evaluation of 14M circuits vs. drive and frequency

33 33 Nonlinear characterization [G]  Active multi-harmonic source/load-pull system  Study of an abrupt SiC varactor  Active multi-harmonic source/load-pull system  Study of an abrupt SiC varactor

34 34 Power dependent detuning and loss [G]  Capacitance and loss increase with RF swing  Dependent on varactor and circuit topology  Capacitance and loss increase with RF swing  Dependent on varactor and circuit topology

35 35 Effect of 2nd harmonic loading [G]  Q–factor drop due to resonance  Relevance in tunable circuit design  Varactors inherently nonlinear devices  Q–factor drop due to resonance  Relevance in tunable circuit design  Varactors inherently nonlinear devices

36 36 Nonlinear varactor characterization [G]  Active multi-harmonic source/load-pull system  Study of an abrupt SiC varactor  Capacitance and loss increase versus RF swing  Harmonic loading dependent  Active multi-harmonic source/load-pull system  Study of an abrupt SiC varactor  Capacitance and loss increase versus RF swing  Harmonic loading dependent | RF |


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