1. 1 Design, Fabrication, and Characterization of GaN High Power Rectifiers Kwang H. Baik Materials Science and Engineering, Univ. of Florida, Gainesville, FL November 2, 2004 Ph.D. Dissertation Defense

2. 2 Outline  Motivation  Theoretical Calculations  GaN Materials Parameters  Intrinsic carrier concentration  Breakdown Voltage (V B )  On-state Resistance (R ON )  Forward Voltage Drop (V F ) & Leakage Current (I R )  Device Modeling  Breakdown Study with Edge Termination Techniques  Electrical Characteristics of GaN Rectifiers  Experimental Data  GaN High Voltage Diodes with Field Plate Termination  High Power Schottky Diode Array (GaN & SiC)

3. 3 Motivation The figure-of-merit for power microwave applications High Temperature, High Power and High Frequency Applications Intrinsic wide bandgap energy High breakdown field for power applications Excellent electron transport properties Heterostructure available and strong piezoelectric polarization effect Johnson’s FOM (v sat E C ) 2 /2  Baliga’s FOM (  E C 2 )

4. 4 High Power Rectifiers SiC high power rectifier product Current ratings of 1A to 20A at 600V, and 5A to 10A at 1200V http://www.cree.com The applications of IGBT modules - UPS Power Supply,Servo Drive, Medical Power Supply, Motor Drives, Inverters http://www.pwrx.com Objective Develop the technology base for GaN-based rectifiers at power levels above 1MW

5. 5 GaN Material Parameters Temperature dependence of bandgap energy of GaN and SiC. Ref. H. Teisseyre et al., 1994 Temperature dependence of bandgap energyDensity of states for GaN Incomplete ionization of impurity atoms

6. 6 Mobility & Recombination Models Analytical Mobility Model Field-Dependent Mobility Model Shockley-Read-Hall Recombination Auger Recombination

7. 7 Intrinsic Carrier Concentration Intrinsic carrier concentration in SiC and GaN as a function of temperature. Ref. R. Kolessar et al., 2001. The small intrinsic carrier concentration in GaN at room temperature enables the high power and temperature applications.

8. 8 Impact Ionization Coefficient Simplified breakdown condition Impact ionization integral Impact ionization coefficient Fulop’s form (Power law expression)

9. 9 E c & V B 1-D Poisson’s equation

10. 10 Breakdown Voltage The calculated reverse breakdown voltage of punch-through diode as a function of doping concentration and standoff region thickness where E C is critical electric field, W P drift region thickness N A doping concentration, and  permittivity GaN punchthrough diode n-n- n n + 3 µm GaN epi can give more than 900V of reverse breakdown voltage with the doping concentration of 10 16 cm -3

11. 11 On-state Resistance On-state resistance (R ON )

12. 12 V F & I R Forward Voltage Drop (V F )Reverse Leakage Current (I R )

13. 13 Device Modeling Scheme Bandgap (E g ) Density of States Incomplete Ionization Impact Ionization coefficients Recombination Models Mobility Models Device design Edge termination Breakdown analysis I-V characteristics Reverse recovery Thermal analysis Medici

14. 14 Edge Termination  Edge termination is critical for obtaining high breakdown voltage and reduced on-state resistance.  Severe electric field crowding around metal contact periphery.  High leakage current and breakdown at the highest electric field Depletion contour Potential contour n Depletion region contour ElectrodeOxide

15. 15 Field Plate Termination n Depletion region contour Oxide breakdown up to 0.7 µm thick Metal contact corner breakdown more than 0.7 µm thick oxide No further improvement in VB beyond 10 µm overlap

16. 16 Field Plate Termination OxideNitrideAlNMgOSc 2 O 3  3.97.58.59.814 Eg (eV)94.76.286.3

17. 17 Guard Ring Termination  Junction spacing and doping should be optimized.  Maximum E-field should be induced at the outside of the junction.

18. 18 Junction Termination Extension  V B values are highly sensitive to the charge in the JTE layer.  Multiple JTE termination technique (JTE1 + JTE2). p+p+ N p-p- JTE layer Depletion boundary

19. 19 Comparison of Edge Termination Methods Reverse breakdown voltage as a function of edge termination techniques.  JTE the highest V B values. (4-fold increase)  The choice of edge termination should be based on the device type, size, and the effectiveness of termination method.  The edge termination designs with a numerical solution technique.

20. 20 Forward I-V characteristics  Temperature dependence of I-V - Mobility degradation effects  Forward turn-on voltage ▫ 1.6 V @ 100 A·cm -2 ▫ Experimental values ~ 3.5 V ▫ Materials issues (defects) 5 µm n (1  10 16 cm -3 ) 1 µm n + (5  10 19 cm -3 ) Anode (Pt) Cathode  V F for pin diodes (even @573K) > V F for Schottky diodes  The absolute value of V F is also much higher than typical experimentally reported values, which are  5 V.

21. 21 Fabrication of GaN Rectifiers GaN high power rectifiers GaN Schottky & PiN rectifiers - GaN epi layer on sapphire - GaN epi layer on freestanding GaN (Vertical geometry) SiO 2 Pt/Au Ti/Al/Pt/Au 3  m n + GaN Al 2 O 3 substrate 3  m undoped GaN Device processing Mesa etch (ICP dry etch) Oxide deposition (PECVD) p-guard rings (Implantation) Window opening (RIE) Ohmic metal formation (RTA) Schottky metal deposition (E-beam)

22. 22 ICP mesa etch: Plasma-Therm ICP Mesa Lithography: AZP 4330 -- 4k RPM, 30 sec. (~3.75 µm straight wall resist) Etch Conditions: 10 sccm Cl 2 5.0 sccm Ar 2 mTorr, 25° C ICP: 300 W RF: 150 W GaN Rectifier Processing: Mesa

23. 23 GaN High Voltage Diodes Unterminated diode Diameters of Schottky metal 54/72/98/134 µm Dielectric edge terminated diode Diameters of Schottky metal 44/62/88/124 µm

24. 24 Emcore substrate # K1645 Diode Forward I-V  Device breakdown after J R =10/cm 2  V B =150 – 240 V  R ON =~2.2 m  cm 2  Very close to simulation results

25. 25 Breakdown voltage at 10A/cm 2 Sample #: M5221sc4Sample #: M5217sc3 Breakdown Voltage

26. 26 Pulse Measurements of Large-Area Diode  Independent of measurement frequencies  R ON =3.4  cm 2 ≥ 3.31 m  cm 2  The total defect density determined by TEM is ~10 6 cm -2.

27. 27 GaN Schottky Diode Array Schottky (Pt/Au) Nitride Oxide (1500 Å) Electroplated Au (3 µm) Freestanding GaN (200 µm) The schematic of high power GaN diode  Schottky diode array with the size of 500 µm×500 µm.  Nitride windows interconnected with electroplated Au (~3µm) 500  m  m 500µm GaN Schottky diode array layout

28. 28 GaN Power Diode Array  161 A forward output current @ 7.12 V  R ON (On-state resistance) = 8 mΩ·cm 2  1.1 kW for 6  6 mm 2 (active device area)  Promising results for practical “on- state current”  Very close to simulated R ON values (3.3 mΩ·cm 2 )

29. 29 SiC Power Diode Array  430 A forward output current @ 5.7 V  R ON (On-state resistance) = 5.8 mΩ·cm 2  2.45 kW for 9  9 mm 2 (active device area)

30. 30 Acknowledgement  Y. Irokawa, J. R. LaRoche, B. S. Kang, J. Kim, and K.P. Lee  Professors F. Ren and S. J. Pearton  S. S. Park and S. K. Lee for GaN substrates  D. Sheridan and G. Y. Chung about device modeling