1. درس مدارهای منطقی دانشگاه قم http://lc-qom.blogfa.com/ مولتی پلکسر Multiplexer)) و دِ مولتی پلکسر ( Demultiplexer) تهیه شده توسط حسین امیرخانی مبتنی بر اسلایدهای درس مدارهای منطقی دانشگاه امیرکبیر http://ceit.aut.ac.ir/~szamani/index_files/logic.htm

2. 2 Multiplexer معنی لغوی  تسهیم کردن  چند خبر را روی یک خط فرستادن مشخصات  2 n data inputs,  n select inputs,  1 output  Used to connect 2 n points to a single point  control signal pattern form binary index of input connected to output 2:1 mux I 0 I 1 A Z I 0 A I 1 I 2 I 3 B Z 4:1 mux I 0 A I 1 I 2 I 3 B Z 8:1 mux C I 4 I 5 I 6 I 7 A 0 1 Z I 0 I 1

3. 3 Multiplexer … …

4. 4 Boolean Functions Z = A' I 0 + A I 1 Z = A' B' I 0 + A' B I 1 + A B' I 2 + A B I 3 Z = A' B' C' I 0 + A' B' C I 1 + A' B C' I 2 + A' B C I 3 + A B' C' I 4 + A B' C I 5 + A B C' I 6 + A B C I 7 2:1 mux I 0 I 1 A Z I 0 A I 1 I 2 I 3 B Z 4:1 mux I 0 A I 1 I 2 I 3 B Z 8:1 mux C I 4 I 5 I 6 I 7 In general, Z =  m k I k in minterm shorthand form 2 n -1 k=0 AI0I0 A I0I0 I1I1 00011110 0 1 0 0 1 1 0 1 0 1

5. 5 Circuit Diagram 4-to-1 MUX A B I0I0 I1I1 I2I2 I3I3 AB Y 00I0I0 01I1I1 10I2I2 11I3I3

6. 6 Cascading MUXes (ترکیب مولتی پلکسرها)  Design a MUX (8:1) by smaller MUXes Z ACB I 0 I 1 I 2 I 3 I 4 I 5 I 6 I 7 4:1 mux 0 1 2 3 S 1 S 0 4:1 mux 0 1 2 3 S 1 S 0 2:1 mux S 0 1 پرارزش

7. 7 Another Implementation پرارزش

8. 8 Larger Data Lines  What if we want to select m-bit data/words? −Combine MUX blocks in parallel with common select and enable signals

9. 9 4-bit data Example:  Selection between 2 sets of 4-bit inputs 2:1 mux I 0 I 1 A Z 2:1 mux I 0 I 1 A Z 2:1 mux I 0 I 1 A Z 2:1 mux I 0 I 1 Z x0x0 x1x1 x2x2 x3x3 y0y0 y1y1 y2y2 y3y3 z0z0 z1z1 z2z2 z3z3 A ?

10. 10 Application Multiple input sources: A+C or A+D or B+C or B+D MUX X Y Sum ABC D SaSb

11. design Mux by decoder 11

12. 12 MUX by 3-State Buffers  Three-state logic in place of AND-OR Output of gates can be connected I 0 I 1 I 2 I 3 S 1 S 0 (b) Y

13. 13 General Logic by MUX Example: F = A' B' C' + A' B C' + A B C' + A B C = A' B' (C') + A' B (C') + A B' (0) + A B (1) A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 F 1 0 1 0 0 0 1 1 C’ 0 1 1 0 1 0 0 0 1 1 8:1 MUX 0 1 2 3 4 5 6 7S2 S1 S0 ABC F A 0 0 1 1 B 0 1 0 1 F C’ 0 1

14. 14 General Logic by MUX  Any Boolean function of n variables can be implemented using a 2 n -to-1 multiplexer.  Any Boolean function of n variables can be implemented using a 2 n-1 -to-1 multiplexer with only not gates.

15. 15 Using Smaller MUX  How about implementing a 4- variable function by a 4-to-1 MUX −Anything else is needed?

16. 16 General Logic By decoder:  Multiple outputs: −A single decoder, −One more OR for each output By MUX:  Multiple outputs: −One more MUX for each output, −No need for OR  Use MUX for few outputs,  Use decoder for many outputs.

17. مثال سال 81 سال 82

18. مثال سال 83 سال 80 18

19. مثال سال 84 19

20. 20 Standard MSI MUXes 74x151  8:1 MUX

21. 21 Standard MSI MUXes 74x157  2:1 4-bit MUX

22. Demultiplexer DEMUX

23. 23 DEMUX

24. 24 Decoder vs. Demux ABC 3:8 dec O0O0 O1O1 O2O2 A B C Enb S2S2 S1S1 S0S0 O3O3 O4O4 O5O5 O6O6 O7O7 EABC O0O0 O1O1 O2O2 O3O3 O4O4 O5O5 O6O6 O7O7 0XXX00000000 100010000000 100101000000 101000100000 101100010000 110000001000 110100000100 111000000010 111100000001

25. 25 Decoder vs. Demux ABC 3:8 dec O0O0 O1O1 O2O2 A B C Enb S2S2 S1S1 S0S0 O3O3 O4O4 O5O5 O6O6 O7O7

26. سؤالات آزمون کارشناسی ارشد 26 سالسؤال 137911 138163 138365 138462 138666 138967 139067 139162