1. Group M3 Nick Marwaha Craig LeVan Jacob Thomas Darren Shultz Project Manager: Zachary Menegakis February 23, 2005 MILESTONE 6 Component Layout DSP 'Swiss Army Knife' Overall Project Objective: General Purpose Digital Signal Processing Chip

2. STATUS Design Proposal (Done) Architecture (Done) Size Estimates/Floorplan/Verilog (88% - comb/Wallace alterations) Gate Level Design (85% - comb/Wallace alterations) Component Layout (Done - However, continue to optimize) To Be Done Complete layout of functional blocks Wallace Tree Multiplier, etc. Schematic Make remaining adjustments for comb/Wallace Verification Test for adjusted blocks

3. DESIGN DECISIONS Comb Made Adjustment for functionality in Real number domain. Wallace Tree Multiplier Currently implementing the basic Wallace Booth Recoding intended next

4. DESIGN DECISIONS Porosity of Basic Components Using only Metal 1 and Poly in order to ease global routing Use Metal one AND Metal 2 for basic components Imaginary Numbers Working on soft IP while verifying current design has tossed off all old complex components.

5. MENTAL BREAK

6. WALLACE TREE MULT. Traditional Wallace Tree Booth Recoding Wallace Tree

7. OUR WALLACE TREE

8. TRANSISTOR COUNT (updates)

9. FLOORPLAN UPDATE

10. UPDATE – TEXT VERSION Since Monday @ 3pm: Craig – Worked on Wallace Tree Darren – Worked to get old missed milestones caught up (Structural) Jake – Worked on Floorplan Nick – Got on a plane…

11. PROBLEMS & QUESTIONS Booth Recoding Still walking through Problem: Timing issues with top level design. Haven’t tackled yet (fixing lower blocks to avoid complications*) * scientific method: only test one variable at a time