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http://www.gsi.de/fair/experiments/NUSTAR/WGs/FEE-DAQ/ Synergy Group for Front-End Electronics and DAQ (SGFD) http://www.gsi.de/fair/experiments/NUSTAR/WGs/FEE-DAQ/ 2004 Initial Meeting 2005 R³B/EXL workshop 2006 2006 NUSTAR/SPIRAL2 3 annual Meetings (GANIL, GSI, KVI… 2007 2007 NUSTAR/SPIRAL2/Italy … Legnaro… 2007 NUSTAR/SPIRAL2/Spain … Huelva) FP7 LoIs
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SGFD scope for NUSTAR/FAIR experiments i. i.Integration FAIR Infrastructure controls coupling interconnects to other detection systems e.g. AGATA ii. ii.Standardisation, Flexibility free coupling of different DAQ systems interconnects for triggers and control signals modularity of the system (local triggers / timestamps) ‚look and feel‘ controls framework iii. iii.Standardisation, Synergies Digitization & digital signal proccessing FPGA, DSP boards Front End Electronics ASICS Interface definitions.
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Integration, Interoperability, and Modularity data-transfer docking stations (station A) slow-control docking stations (station B) e.g. GridCC (AGATA, CMS, …) time-synchronization docking (station C) station BuTiS@FAIR (100ps/km) + local TDS System design for i & ii:
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EXL & R³B DAQ / H.Simon Data-transfer docking stations (station A) Backends… data collection from detector systems (N M) transfer and event building –Interface to processor farm –Interface to online analysis –Interface to slow control systems –… storage Under evaluation: Narval(Ganil/Agata) DABC(„FAIR“ DAQ)
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EXL & R³B DAQ / H.Simon Slow-control docking stations (station B) H. Wörtche, H.S 1.checking setup (hardware, systems) 2.system initialisation 3.system parameter setting 4.monitoring (analog/digital) and safety C&C loops: Settings Raw Data, preanalyzed data, analized data C&C loops: Settings Raw Data, preanalyzed data, analized data procedure: calibration, optimization, monitoring, stabilisation procedure: calibration, optimization, monitoring, stabilisation eg PID : identification figure-of-merit variation of parameters eg PID : identification figure-of-merit variation of parameters tight integration, hierarchic in data treatment First implementations: digital signal processing First implementations: digital signal processing with f-o-m determination with f-o-m determination (timing, n-gamma) @ KVI (timing, n-gamma) @ KVI
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EXL & R³B DAQ / H.Simon System design for iii: Needed: Intermediate steps for R³B and EXL/R³B Demonstrators: timeline now ! „Available from the shelf“: AMS-02 readout: low power VA64_hdr.9a (Ideas) e.g. AMS-02 readout: low power VA64_hdr.9a (Ideas) 0.7 mW/ch, correct channel count … 0.7 mW/ch, correct channel count … others: others: Ians talk But: ¬ triggering and sparsification/readout speed ! Front End Electronics
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EXL & R³B DAQ / H.Simon R³B precursor: extended experimental Setup at Cave C For 2007: proton tracking behind magnet with drift chambers (100×80 cm 2 ) resolution ~200 m p 16 mm For 2007: proton tracking around the target with Si-strip detectors
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EXL & R³B DAQ / H.Simon Vertex reconstruction for ions and protons 41 × 72 mm 2, strip pitch about 100 m Dynamic range – 100 keV - 14 MeV Front of the SSD FEE AMS(-02) readout: e.g. NIM A 439 (2000) 53 6+10 read out 2*5(320) + 6(384) VA_hdr.AMS64 resp. 9a chips IDEAS/Norway SIDEREM NIM module
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EXL & R³B DAQ / H.Simon VA_S1 320 ch VA_S2 320 ch VA_K 384 ch HCC S K J. Hofmann, W. Ott, N.Kurz (GSI) 12 Bit ADC ca. 80 s readout time (5MHz) DSP TMS320VC6414 (TI) FPGA Virtex-4 LX25 (Xilinx) SIlicon Strip DEtector REadout Module (SIDEREM)
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EXL & R³B DAQ / H.Simon SIDEREM system J. Hofmann, W. Ott, N.Kurz (GSI)
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EXL & R³B DAQ / H.Simon Proton Driftchamber FEE GTB Bus Piggy back PNPI St Peterburg PNPI Fermilab ASDQ block diagramme
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EXL & R³B DAQ / H.Simon System integration via GTB piggy back L. Uvarov, V. Golovtsov, V. Yatsura, A. Kandzadeev (PNPI) Ch. Wimmer, Ch. Müntz, J. Stroth (UNI Frankfurt) J. Hofmann, W. Ott, N.Kurz (GSI) Cable connections over distances up to 100m. Screened 50 wires cable, 50 pin Mini-Ribbon connectors. Single master, up to 15 slaves for GTB32 configuration. Data rates up to 25 Mbytes/s. Differential transfer, address and data are multiplexed. 16 or 32 bit address and data width. Access to slaves via Token or direct Addressing GTB features:
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EXL & R³B DAQ / H.Simon SAM/GTB readout setup J. Hofmann, W. Ott, N.Kurz (GSI)
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EXL & R³B DAQ / H.Simon What‘s missing ? Self trigger capability Timestamps Frontend Trigger Integration e.g. programmable event storage and trigger post processing i.e. variable latency
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EXL & R³B DAQ / H.Simon One way out (… more to come …)
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Christian J. Schmidt et al. N-XYTER The First Dedicated Neutron Detector Readout ASIC INFM - Perugia Forschungszentrum Jülich Hahn Meitner Institut - Berlin Ruprecht Karls Universität - Heidelberg AGH University of Sci. and Tech. - Krakow
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EXL & R³B DAQ / H.Simon N-XYTER: The DETNI Neutron Detector Readout ASIC Architecture: 128 channel data driven charge sensitive front end Front end for either polarity input signals: Charge sensitive pre-amp Fast analogue shaper as timing channel: init peak detector, timestamp Slow analogue shaper as energy channel with peak detection Readout: de-randomizing analogue energy and digital time stamp (2ns resolution) FIFO 2D-spatial information through X-Y-coincidence possible background suppression through spectroscopic window resolution enhancement through center of gravity determination de-randomizing robust and self sparsifiing readout strategy (token ring). AMS 0.35 microns
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EXL & R³B DAQ / H.Simon Specifications for DETNI-ASIC as of 19.06.04 PropertySpec agreed uponGd/Si-MSDGd/CsI-MSGCB-CASCADE GEM channel pitch50 µm Arbitraryarbitrary input capacitance C in 30 pF10....15 pF or rather 25pF ? 23 pF X 40 (33)pF Y 10....30pF T p timing channel30 ns T energy channelT 5% = 650 nsDef: Peak is above 5% no longer than T 5% Max ENC at C in and T p for timing channel optimize550 e2000 e660 e Dynamic range & gain two versions, low gain later (8 – 120)*10 3 e (2 –30)*10 5 e (8 – 69)*10 3 e(2 - 30)*10 5 e(2 – 400)*10 3 e no. of chan. per chip128 64, 128 timing resolution4 ns (opt. res.)8 ns4 ns10 ns Max. % dead-time10 % -> fifo depth: 1010 % average rate per chan.160 kHz 960 kHz160 kHz
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EXL & R³B DAQ / H.Simon Token Ring Schema as proposed by Ulrich Trunk 2003 Periodic readout at 20MHz Token asynchronously passes from channel to channel in search of data Within one readout cycle token could pass through all channels If token encounters occupied channels, data readout is initiated. After readout the token passes to the next channel. 20 MHz/128 Ch ≈ 160 kHz 10 Bit ADC (ENOB 10.4)
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EXL & R³B DAQ / H.Simon DETNI Collaboration S.S. Alimov a, A. Brogna b, S. Buzzetti b,c, W. Dabrowski d, T. Fiutowski d, B. Gebauer a, G. Kemmerling e, M. Klein b, C. Petrillo f, F. Sacchetti f, Ch.J. Schmidt g, K.H. Soltveit b, R. Szczygiel d,h, Ch. Schulz a, C. Thielmann e, U. Trunk b, P. Wiacek d, Th. Wilpert a a Hahn-Meitner-Institut Berlin, Glienicker Str. 100, D-14109 Germany b Physikalisches Institut der Universität Heidelberg, Philosophenweg 12, D-69120 Heidelberg, Germany c INFM & Dipartimento di Elettronica et Informazione, Politecnico di Milano, Piazza Leonardo da Vinci 32, Milano I-20133, Italy d Faculty of Physics and Applied Computer Science, AGH University of Science and Technology, al. Mickiewicza 30, 30-059 Krakow, Poland e Central Institute for Electronics, Research Centre Jülich, 52425 Jülich, Germany f INFN & Dipartimento di Fisica, Universita di Perugia, Via A. Pascoli, Perugia I-06123, Italy g Gesellschaft für Schwerionenforschung, Planckstr. 1, 64291 Darmstadt, Germany h Institute of Nuclear Physics, Polish Academy of Sciences, ul. Radzikowskiego 152, 31-342 Krakow, Poland
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EXL & R³B DAQ / H.Simon Access via (Super)FRS project Brano Sitar et al., Chiara Nociforo, H.S., Martin Winkler + Detector Lab. GSI „Bratislava“ wire chambers (FP6 design study) 1.Deliverable includes single wire readout 2.Idea: Test N-XYTER 256 Ch. evaluation board 3.Interface via USB2 to PC readout board Q3 /2007 chamber Q1or2/2008
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EXL & R³B DAQ / H.Simon No summary FIN
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NUSTAR@FAIR: DAQ/FEE and slow control NUSTAR COUNCIL NUSTAR DAQ Haik Simon (coord.) Michael Böhmer Michael Block Christophor Kozhuharov Nikolaus Kurz Ian Lazarus Johan Nyberg Lolly Pollacco Heinrich Wörtche … EXL Ian Lazarus R³B Haik Simon DESPEC Johan Nyberg … Thomas Nilsson NUSTAR Slow Control Heinrich Wörtche ‚GSI‘ DAQ Nikolaus Kurz, Hans Essel Experiments Related … Spiral2 Alpi
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EXL & R³B DAQ / H.Simon Time-synchronization docking (station C) BuTiS: Bunchphase Timing System @ FAIR Standard frequencies: 100 kHz, 10 MHz, 76 MHz(PHELIX), 155,52MHz(OC-3, network std.), 200 MHz Absolute time stamps (locally via GPS) Precision better 100 ps / km Optical fiber system, receiver cost high: (few 10k€) one receiver/ cave local time distribution system
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