1. Design Methodology
EMT 251
Chapter 8: page 425

2. VLSI Design Methodology
Silicon Foundry
IC Design Team
CAD Tool Provider
Design Rules
Simulation Models and parameters
Mask Layouts
Integrated circuits (IC)
Process Information
Software Tools
Relationship between a silicon foundry,
an IC design team and a CAD tool provider

5. Top Down
(algorithm)
Bottom Up
(physical)

6. Application Specific Integrated Circuits
(ASICs) IC
Standard IC
ASSPs
ASIC
Programmable IC
Semi Custom IC
Custom IC
FPGA
Gate Array
Linear Array
Standard Cells
Full Custom IC
ASSPs : Application Specific Standard Products

7. ASIC Design Methodologies
ASIC Design Methodology
This approach is extremely slow, expensive
It is only used to design very high performance systems
Full-custom
design
This approach is reasonable fast, less expensive
Most ASICs are currently designed using this method
Standard-cell
based design
This approach is fast and less expensive
ASIC performance are relatively slow
Gate-array
The design process is very fast and cost effective
ASIC performance are slow
FPGA based

8. Comparison of CMOS design method
Non recurring Engineering
Unit Cost
Power Dissipation
Complexity of Implementation
Time to market
Performance
Flexibility
Microprocessor/DSP
Low
Medium
High
PLA
FPGA
Gate Array/ SOG
Cell Based
Custom Design
Very high
Platform based
NRE – page 483

9. ASIC-Benefit • Improve performance • Reduce power consumption
• Mix Analog and Digital Designs
• Design optimization through IC manufacturing process
• Development Tools support HDL and Schematic design approach

10. ASIC-Drawbacks • Inflexible design
• Deployed systems can not be upgraded
• Mistakes in product development are costly
• Updates requires a redesign
• Complex and expensive development tools

12. POP QUIZ

13. THE END