1 SysCore for N-XYTER Status Report Talk by Dirk Gottschalk Kirchhoff Institut für Physik Universität Heidelberg

2 SysCore SysCore Board Version 1.00

3 Basic Components and Interfaces  Xilinx Virtex4 FPGA  320 up to 576 user I/Os  LAN interfaces  SD-Card connector  LAN, USB, JTAG programming capability via CPLD  RS232 interface  High Speed Serial Ports (MGTs)  DDR SDRAM  user definable I/O  Watchdog

4 SysCore as N-XYTER Application

5 N-XYTER Interface N-XYTER interface Digital part:  Token manger interface pins  I2C bus with dedicated register reset  Differnetial clock inputs  Differential synchronous timestamp reset  Differential clock divider outputs  8 Bit differential data busses Analog part:  Differential analog output to ADC

6 SysCore Design Changes for Version 2 Board  I/O connectors changes to ERNI for N-XYTER  PCI-Express connector and PCI clock PLL removed  Improve some footprints  Adding fixing holes  Removed some minor hardware bugs (yes, there where some ;-))

7 N-XYTER Hardware Hardware Testing Status for Version 1 Board Done:  FPGA works  Ethernet works  SD-RAM works  SD-Card works  Actel FPGA itself works  MGT work  RS232 works  I/Os work

8 N-XYTER Hardware Hardware Testing Status To do (in progress):  Combination of the Actel chip with Flash EPROM  USB configuration interface  USB data interface

9 Current Status  Schematic for Version 2: allmost done  Bill of Material: available in a few days  Placement of components: all devices from version 1 are still placed. New devices to be placed  Routing: in progress with same problems (Holger (Version 1 Layouter) will support me on Sunday with the Layout)  Bidding for production is in progress (Some offers are available already)

10 Further Progress  Routing of the new SysCore board  Production of 2 prototypes  Production of first batch  SysCore 2 availability planed for April/May 2008