1 ECL electronics status and plan Vladimir Zhulanov, Yury Usov BINP, Russia

Barrel electronics 2 16 channels / shaper, FADC, pipeline, DSP on shaper board 12 DSP-shapers / collector

Shaper-DSP 3 The second version is ready and waits to be delivered. Modifications: 1.ADC redesign 2.Tantalum  ceramic 3.Supply 5  7.5, 12  15 4.Tail compensation for FAM

4 Noise Some PCB layout problem

Dynamic range 5 Good linearity

ECL-COLLECTOR 6 SER/DESER LVDS drivers, SCK, RCK 12 Shaper- DSPs FPGA with embedded CPU RocketIO FINESSE Flash memory 512 MByte DDR2 memory 512 MByte DAC LVDS TTD PLL RCKSCK calib FAM Clock Ethernet PC

Endcap electronics A faster preAmplifyer and shaper are needed for endcap with pure CsI. The new preAmplifyer design has been tested on beam with pure CsI. Noise is ~1000 e. The first prototype of the preAmplifyer will be ready in August. The Shaper (CAMAC version) with 30 ns shaping time was used in beam test. The new shaper design will be ready in Oct

Status & plans 1.The design of Shaper-DSP is ready. The ADC problem must be solved in the second version of the Shaper-DSP. 2.The new FINESSE (with MGT) and ECL_COLLECTOR are needed to verify the whole data path. 3.The schematics of the ECL COLLECTOR is ready. 8 Main goal: start mass production of Shaper-DSP in FY2010

Thank you 9

Waveform fitting 10

ECL FINESSE 11

Shaper-ADC and ECL FINESSE 12