Fan Out WLP Technology Packaging as 2, 3D System in Packaging Solution Jay Kim nepes Corporation, System Packaging Division October 13-15, 2015

Outline 1. Introduction 2. Fan-out technology 3. System In Packaging Solution 4. Scaled UP Fan Out Packaging 5. Summary

What are expectations & driven ? Present Time to Market Time to Revenue Higher levels of component integration Smaller form factor Energy efficiency and performance System level cost Security Efficient hardware design Software/firmware enabled Past Features and functionality Power/ Performance Cost

Fan Out WLP offering Does not have to be universal solution for the ALL requiring ultra small & extremely low cost Solution to relax the limitation of WLP, FC PKG or W/B PKG in some aspects Simpler supply chain at single manufacturing location Integration capability of heterogeneous devices & components Possible eco-system with device ‘owner’ & end user working for entire system solution

Fan Out WLP Technology Eliminating package substrate, Au wire & C4 bumps Reduced electrical parasitic Higher frequency response Small & thin Single chip, Multi chip & embedding component capability (w/4RDL) Proprietary feature of Embedded Ground Plane (Cu) JEDEC, Commercial & Industrial. Automotive level reliability

Fan Out WLP - Automotive 77 GHz Radar Excellent RF isolation, controlled impedance, low insertion loss, low attenuation, good thermal dissipation and automotive reliability Small (6x6mm, 1 metal layer), Short transmission lines Can expose back of die for heatsink Embedded Ground Plane for ground and shielding Can embed an antenna structure

Fan Out WLP - Automotive 77 GHz Radar

Fan Out WLP - Thin & small device 0.8 ~ 1.0 x 1.0 mm2 sized with < 300 um thick Optimized process & a feature for thin panel manufacturing Replaceable BGA or QFN but thinner & better

Fan Out WLP – Face up & Embedding, Stacking (VF-FOP) Enabling die-face up for sensor application Stacking & device pre-mounting possible

System in Fan Out WLP

System in Fan Out WLP - Features inside 14mm x 17mm x 1.7mm (after PoP) 3~4 active devices (AP, PMIC, Flash, Wi-Fi) 90~110 discrete components 4 Metal layers PoP supportive enabling DDR as option

System in Fan Out WLP - Multi layer & components RDL design rule in tied up with function, reliability Antenna & Inductor embedding possible with multi RDL

System in Fan Out WLP - Features & Benefits Majority of the components integrated inside Get to market ~25% faster development time and reduce design time Ultra-small form factor Gives >50% reduction over current discrete solutions Embedded software and firmware is available and fully optimized for the SCM Provides a reduction in validation effort Memory enabled and power management integrated Reduces design complexity of integrating and certifying DDR memory and power management into customer design Challenge In Eco system – from product design, testing, MP solution, Soft/firm ware, supply chain Reduces customer’s supply chain complexity and Improves time to market

Application - IoT platform Single IoT board with 8bit μ - processor + BLE + Wi-Fi Fan out SiP basis - Integrated all function into 1 chip (DotDuino - 100 % compatible SiP module with Arduino)

Scaled UP Fan Out Package New material development for large panel processing Very high through put & material utilization in build up process (Dielectric ~ RDL) A flexibility in panel size (die placement ~ mold)

Summary Fan Out WLP as high performance & small form factor solution in place Face up & stackable Fan Out Package (VF-FOP) introduced for sensor & memory application High Integrated SiP is ready for true production for customers looking for faster market in & development TAT Scaled up Fan Out Packaging is to implemented with extra effort in material & process development

Thank you for attention ! nepes Corporation www.nepes.co.kr Jay Kim (jhkim@nepes.co.kr, +82-10-4056-9339)