Presentation on theme: "Ragan Technologies, Inc. Presents - Zero Shrink Technology - ZST™ Process for Embedding Fired Multi-Layer Capacitors in LTCC Packages."— Presentation transcript:
Ragan Technologies, Inc. Presents - Zero Shrink Technology - ZST™ Process for Embedding Fired Multi-Layer Capacitors in LTCC Packages
2 Ragan Technologies ZST™ Overview Who is RTI? What is ZST™? What is passive integration? What are the benefits of passive integration? What are the benefits of ZST™ for capacitor integration? Process used to embed fired capacitors in ZST™ Summary
3 Who is RTI? Ragan Technologies, Inc. is a privately held technology transfer company based in San Diego, CA. RTI offers turn-key technology development services specializing in tape forming and electronic ceramics. The founders of RTI have over 190 years of cumulative experience in the technical ceramics industry.
4 What is ZST™? ZST™ is a unique low temperature co- fire tape CAPABILITY for MCM production. ZST™ is not a new material, but a process. With this new patented process, sheets can be produced that do not shrink when fired.
5 What is ZST™? By controlling the particle size distribution of the frit, the resulting shrinkage can controlled. The process has been tested with thousands of combinations of refractory oxides and frits.
6 What is ZST™? By adjusting the raw materials, tapes can be made with: High K or low K High CTE or low CTE Thermal conductor or insulator Electrical conductor or insulator Porous or hermetic AND all sheets can be co-fired because they will not shrink when fired!
7 What is ZST™? With this new process, RTI has created new engineering degrees of freedom. Because the ceramic does not shrink when fired, it is possible to embed solid articles in the green tape such as...
8 What is ZST™? Solid metal wires or ribbons for high power leads or lead frames Fired BeO thermal spreaders Fired alumina die to form a non-reactive resistor printing pad Resistive or Inductive components
9 What is ZST™? Eliminate costly yield problems associated with shrinkage variation. Shrinkage tolerances of 0.03% typical. Precise feature location for closer pitch vias and lines.
10 What is ZST™? Create high strength composites by building up the circuit on fired alumina. ZST™ forms strong oxide bond. Resultant composite flexural strength approaches that of alumina. (>250MPa)
11 What is passive integration? Passive integration is the process of incorporating passive components (specifically capacitors, resistors, and inductors) into the MCM substrate or integrated circuit package.
12 Benefits of passive integration Increased circuit density Decreased circuit size Reduced weight Shorter leads Fewer interconnects Improved electrical performance Lower costs in volume production
13 Capacitor integration with ZST™ Current technology is to print the conductor plates on subsequent layers of the LTCC tape and form the capacitors as the circuit is stacked. This process is limited by the K of the LTCC, the thickness of the tape, and the resolution and precision of the printer.
14 Capacitor integration with ZST™ Embedding pre-tested multi-layer ceramic capacitors in ZST™… “Known good die” concept Broad range of dielectric types Fewer interconnects = improved signal integrity
15 Capacitor integration with ZST™ Facilitates automation - single pick and place operation replaces multiple printing operations and solder re-flow yield problems. Facilitates miniaturization - increased volumetric efficiency = smaller circuit Improved reliability - eliminate yield losses due to shorts and opens associated with screen printed capacitors in LTCC.
16 Process for embedding fired capacitors in ZST™ Process sequence: Print conductors Punch sheets Stack sheets Insert capacitors Laminate External metalization Fire
17 Design substrate For demonstration purposes a simple two inch square substrate was designed with five buried capacitors. Two dielectrics tested: 1206 X7R 0.1µF 1206 NPO 33pF
18 Print conductors The conductor traces were printed on the base layer with Heraeus C4740L Ag conductor paste and dried.
19 Punch cavities Subsequent two layers were punched to form the cavity for the 1206 case size.
20 Insert capacitors The capacitors were inserted into the cavity, with their terminations aligned over the printed pads.
21 Lamination The cover sheet was then placed and the stack was iso-statically pressed in a die. 2500psi - 10 min. - 50ºC
22 Co-Fire The substrate was then metalized with the Ag conductor paste and fired. –875ºC/30 min.
23 Capacitance measurement The capacitance and DF of the embedded chips was verified after firing.
24 Thermal Cycling Preliminary thermal cycling tests were positive… 0ºC to 100ºC to 0ºC - 20 cycles 0ºC soak 1 minute (ice water) Transfer into boiling water 10 seconds 100ºC soak 1 minute Transfer into ice water 10 seconds Repeat
25 Summary ZST™ offers unique solutions to design problems: Absolute shrinkage control - eliminate variation Control electrical properties - K etc. Control mechanical properties - CTE etc. Embed solid objects - metal & ceramic These properties can be co-fired together, because the shrinkage is CONTROLLED