Computer Organization and Design Transistors & Logic - II Montek Singh Oct {21,28}, 2015 Lecture 10

Today’s Topics  Basic gates  Boolean algebra  Synthesis using standard gates Truth tables Truth tables Universal gates: NAND and NOR Universal gates: NAND and NOR Gates with more than 2 inputs Gates with more than 2 inputs Sum-of-Products Sum-of-Products DeMorgan’s Law DeMorgan’s Law 2

Single-Input Logic Gates 3

Two-Input Logic Gates 4

More Two-Input Logic Gates 5

Multiple-Input Logic Gates 6

7

Boolean Algebra Algebra of 1s and 0s

9 Table of Identities

10Duals  Left and right columns are duals  Replace ANDs and ORs, 0s and 1s

11 Single Variable Identities

12Commutativity  Operation is independent of order of variables

13Associativity  Independent of order in which we group  So can also be written as and

14Distributivity

Substitution  Can substitute arbitrarily large algebraic expressions for the variables Distribute an operation over the entire expression Distribute an operation over the entire expression Example: Example: X + YZ = (X+Y)(X+Z) Substitute ABC for X ABC + YZ = (ABC + Y)(ABC + Z) 15

16 DeMorgan’s Theorem  Used a lot NOR  invert, then AND NOR  invert, then AND NAND  invert, then OR NAND  invert, then OR

17 Truth Tables for DeMorgan’s

18 Algebraic/Boolean Manipulation  Apply algebraic and Boolean identities to simplify expression Example: Example:

19 Simplification Example Apply

20 Fewer Gates

From Truth Table to Gate-Level Circuit

Now We’re Ready to Design Stuff!  We need to start somewhere usually it’s the functional specification usually it’s the functional specification A B Y If C is 1 then copy B to Y, otherwise copy A to Y C First step is to translate a verbal description into a tabular form. Any combinational function can be represented as a “truth table.” A truth table lists the output(s) for each combination of inputs. Truth Table

We Can Make Most Gates Out of Others  Example 1: B > A Output Y is 1 if and only if B is 1 AND A is 0 Output Y is 1 if and only if B is 1 AND A is 0  Y = B AND (NOT(A)) B>A A B y

We Can Make Most Gates Out of Others  Example 2: A XOR B Output Y is 1 if and only if … Output Y is 1 if and only if …  B is 1 AND A is 0 --OR—  B is 0 AND A is 1  Y = B AND (NOT(A)) OR A AND (NOT(B)) XOR A B Y A B Y Symbol for XOR

How many gates do we really need?

One Will Do!  NANDs and NORs are universal one can make any circuit out of just NANDs, or out of just NORs! one can make any circuit out of just NANDs, or out of just NORs!  Ah! But what if we want more than 2-inputs? = = = = = =

Gate Trees: Multi-input gates Suppose we have some 2-input XOR gates: (same idea holds for AND and OR gates) And we want an N-input XOR: XOR(A 1, A 2, A 3 … A N ) =XOR … (XOR(XOR(A 1, A 2 ), A 3 ) … A N ) A0011A0011 B0101B0101 C0110C0110 t pd = 1 (latency) t pd (latency)= O( ___ ) in the WORST CASE. output = 1 iff number of 1s in input is ODD (“ODD PARITY”) Can we compute N-input XOR faster? N

Gate Trees N-input TREE has O( ______ ) levels... Input  Output propagation takes O( _______ ) gate delays. log N log 2 N

Design Approach: Sum-of-Products Three steps: 1. Write functional spec as a truth table 2. Write down a Boolean expression for every ‘1’ in the output 3. Wire up the gates!  This approach will always give us logic expressions in a particular form: SUM-OF-PRODUCTS (“SOP”) SUM-OF-PRODUCTS (“SOP”)  “SUM” actually means OR  “PRODUCT” actually means AND Truth Table

Straightforward Synthesis  We can implement SUM-OF-PRODUCTS… …with just three levels of logic: …with just three levels of logic:  INVERTERS/AND/OR ABCABC ABCABC ABCABC ABCABC Y

Notations  Symbols and Boolean operators:

DeMorgan’s Laws  Change ANDs into ORs and vice-versa

AB=A+B Useful Gate Structures  NAND-NAND  NOR-NOR C A B Y C A B Y  C A B Y  C A B Y C A B Y C A B Y AB=A+B “Pushing Bubbles” DeMorgan’s Laws

An Interesting 3-Input Gate: Multiplexer  Based on C, select the A or B input to be copied to the output Y. Truth Table A B Y C If C is 1 then copy B to Y, otherwise copy A to Y 2-input Multiplexer A B C 0 1 Gate symbol

Multiplexer (MUX) Shortcuts S01S S01S S01S I0I1I2I3I0I1I2I3 Y S 0 S 1 A 4-input Mux (implemented as a tree) S01S S01S A2B2A3B3A2B2A3B3 Y0Y0 S S01S S01S A0B0A1B1A0B0A1B1 Y1Y1 Y2Y2 Y3Y3 A 4-bit wide 2-input Mux ABCDSABCDS Y A 0-3 B 0-3 S Y 0-3

Next Class  Arithmetic circuits