1. BOOLEAN ALGEBRA Saras M. Srivastava PGT (Computer Science)
Kendriya Vidyalaya, IISc Bangalore –

2. Saras M. Srivastava PGT CS, KV IISc, Bangalore
What is logic ?
Any logical things have only two state either true or false.
Example :
Is 12 – 10 = Yes
Is India post populated country in the world? No
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

3. BINARY VALUED QUANTITIES
Binary Decision :
THE DECISION which results into either YES /TRUE OR NO/FALSE
Tautology :
If the result of any logical statement or expression is always TRUE or 1
Fallacy :
If the result is always FALSE or 0
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12

4. BINARY VALUED QUANTITIES
Binary Decision :
THE DECISION which results into either YES /TRUE OR NO/FALSE
Tautology :
If the result of any logical statement or expression is always TRUE or 1
Fallacy :
If the result is always FALSE or 0
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12

5. LOGICAL OPERATIONS Logic operations
NOT (Complement)- Changes TRUE to FALSE, 1 to 0, high to low.
AND — “A AND B” is true if A and B are individually true (A•B, AB, A.B)
OR — “A OR B” is true if either A or B is true (or both are true) (A+B, A.B).
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12

6. Evaluation of Boolean Expression using truth table
Prepare truth table
X’Y’ + X’Y
XY’(Z+YZ’) + Z’
Prove using truth table
(X + Y)’ = X’Y’
X + XY = X
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12

7. LOGIC GATES

8. What is logic Gate ?
Gate is an electronic circuit which operates on one or more signals to produce an output signal. Basically there are three type of Logic Gate.
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12

9. TRUTH TABLES
Truth table Represents all the possible values of logical variables / statements along with all the possible results of the given combination of values.
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12

10. Saras M. Srivastava PGT CS, KV IISc, Bangalore
Inverter (NOT Gate)
Truth Table A A’ 1 A A’
Symbol
Input
Output
This Gate operates on single variable and operation performed by NOT operator called complementation. Thus A means complement of A’.
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

11. Saras M. Srivastava PGT CS, KV IISc, Bangalore
AND GATE:
The AND Gate have two or more than two input signals and produce an out put signal.
Two input AND Gate
Truth Table A B
A.B A B
A.B 1
If both inputs signals are 1 (i.e. high) then the output will also be 1 (i.e. high).
Otherwise, the output will
be 0 (i.e. low).
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

12. Saras M. Srivastava PGT CS, KV IISc, Bangalore
OR Gate:
The OR Gate have two or more than two input signals and produce an out put signal. A B
A+B A B
A+B 1
If either of the two input signals are 1 (high), or both of them are 1 (high), the output will be 1 (high).
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

13. Universal Gates
NAND and NOR Gate are known as Universal Gate because any Boolean function can be constructed using only NAND or only NOR gates.

14. Saras M. Srivastava PGT CS, KV IISc, Bangalore
The NAND Gate:
The NAND (Not AND) Gate has two or more input signal but only one output signal. If All the inputs are 1 (i.e. high), then the output l is 0 (i.e. low) A B Y 1
The NAND gate is a combination of an AND gate followed by an inverter (not Gate). It is compliment of AND Gate. A Y B
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

15. NAND Gates into Other Gates:-
Saras M. Srivastava PGT CS, KV IISc, Bangalore
NAND Gates into Other Gates:-
We can create other gates with the help of NAND Gate. A Y Y A B
NOT Gate
AND Gate A B Y
OR Gate
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

16. NOR Gate :
The NOR (Not OR) Gate has two or more input signal but only one output signal. If All the inputs are 0 (i.e. low), then the output signal is 1 (i.e. high) A B Y
Truth Table for NOR Gate A B Y 1
The NOR gate is a combination of an OR gate followed by an inverter (not Gate). It is compliment of OR Gate.

17. XOR Gate (Exclusive OR Gate):- We use XOR Gate for parity check
XOR Gate (Exclusive OR Gate):- We use XOR Gate for parity check. XOR Gate produces output 1 for only those inputs combinations that have odd number of 1’s. # Odd number of 1’s produce output 1.
# A B= AB’+A’B
Two input XOR Gate + A B
Y=AB’+A’B
Truth Table for XOR Gate : A B Y 1

18. XNOR Gate (Exclusive NOR Gate):- We use XNOR Gate for parity check
XNOR Gate (Exclusive NOR Gate):- We use XNOR Gate for parity check. XNOR Gate produces output 1 for only those inputs combinations that have even number of 1’s. # Even number of 1’s and 0’s produce output 1.
Truth Table for Two Input XNOR Gate
A B=AB+A’B’ A B Y 1

19. Laws & Theorems of Boolean Algebra

20. Saras M. Srivastava PGT CS, KV IISc, Bangalore
Boolean Algebra
A Boolean algebra is defined as a closed algebraic system containing a set K (two or more) elements and two operators,  and +.
Operators + and  are similar to + and x.
Useful for identifying and minimizing circuit functionality
Identity elements
a + 0 = a
a  1 = a
0 is the identity element for the + operation.
1 is the identity element for the  operation.
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

21. Saras M. Srivastava PGT CS, KV IISc, Bangalore
Duality
The principle of duality says that if an expression is valid in Boolean algebra, the dual of that expression is also valid.
To form the dual of an expression, replace all + operators with  operators, all  operators with + operators, all ones with zeros, and all zeros with ones.
Form the dual of the expression
a + (b  c) = (a + b)  (a + c)
Following the replacement rules…
a  (b + c) = a  b + a  c
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

22. Commutativity and Associativity
Saras M. Srivastava PGT CS, KV IISc, Bangalore
Commutativity and Associativity
The Commutative Property:
For every a and b in K,
a + b = b + a
a  b = b  a
The Associative Property:
For every a, b, and c in K,
a + (b + c) = (a + b) + c
a  (b  c) = (a  b)  c
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

23. Distributivity and Complements
Saras M. Srivastava PGT CS, KV IISc, Bangalore
Distributivity and Complements
The Distributive Property:
For every a, b, and c in K,
a  ( b + c ) = ( a  b ) + ( a  c )
a + ( b  c ) = ( a + b )  ( a + c )
The Existence of the Complement:
For every a in K there exists a unique element called a’ (complement of a) such that,
a + a’ = 1
a  a’ = 0
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

24. Saras M. Srivastava PGT CS, KV IISc, Bangalore
Involution
This theorem states:
a’’ = a
Taking the double inverse of a value will give the initial value.
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

25. Saras M. Srivastava PGT CS, KV IISc, Bangalore
Absorption
This theorem states:
a + ab = a a(a+b) = a
To prove the first half of this theorem:
a + ab = a ab
= a (1 + b)
= a (b + 1)
= a (1)
a + ab = a
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

26. Saras M. Srivastava PGT CS, KV IISc, Bangalore
DeMorgan’s Theorem
A key theorem in simplifying Boolean algebra expression is DeMorgan’s Theorem. It states:
(a + b)’ = a’b’ and (ab)’ = a’ + b’
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

27. Truth Table to Boolean Expression
Saras M. Srivastava PGT CS, KV IISc, Bangalore
Truth Table to Boolean Expression
Converting a truth table to an expression
Each row with output of 1 becomes a product term
Sum product terms (SOP) together.
Any Boolean Expression can be
represented in sum of products form! x 1 y 1 z 1 G 1
xyz + xyz’ + x’yz
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

28. Equivalent Circuit Representations
Saras M. Srivastava PGT CS, KV IISc, Bangalore
Equivalent Circuit Representations
Number of 1’s in truth table output column equals AND terms for Sum-of-Products (SOP) x y z 1 G
G = xyz + xyz’ + x’yz
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

29. Saras M. Srivastava PGT CS, KV IISc, Bangalore
Minterms and Maxterms
Each variable in a Boolean expression is a literal
Boolean variables can appear in normal (x) or complement form (x’)
Each AND combination of terms is a minterm
Each OR combination of terms is a maxterm
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

30. Minterms and Maxterms: Example
Saras M. Srivastava PGT CS, KV IISc, Bangalore
Minterms and Maxterms: Example
Minterms
x y z Minterm
x’y’z’ m0
x’y’z m1 …
xy’z’ m4
xyz m7 :
Maxterms
x y z Maxterm
x+y+z M0
x+y+z’ M1 …
x’+y+z M4
x’+y’+z’ M7
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

31. Functions with Minterms
Saras M. Srivastava PGT CS, KV IISc, Bangalore
Functions with Minterms
Minterm number same as row position in truth table (starting from top from 0)
Shorthand way to represent functions x 1 y z G
G = xyz + xyz’ + x’yz
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.
G = m7 + m6 + m3 = Σ(3, 6, 7)
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

32. Complementing Functions
Saras M. Srivastava PGT CS, KV IISc, Bangalore
Complementing Functions x 1 y 1 z 1 G 1 G’ 1
G = xyz + xyz’ + x’yz
G’ = (xyz + xyz’ + x’yz)’
Can we find a simpler representation?
credential:
bring a computer
die photo
wafer :
This can be an hidden slide. I just want to use this to do my own planning.
I have rearranged Culler’s lecture slides slightly and add more slides. This covers everything he covers in his first lecture (and more) but may
We will save the fun part, “ Levels of Organization,” at the end (so student can stay awake): I will show the internal stricture of the SS10/20.
Notes to Patterson: You may want to edit the slides in your section or add extra slides to taylor your needs.
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

33. Conversion Between Canonical Forms
Saras M. Srivastava PGT CS, KV IISc, Bangalore
Conversion Between Canonical Forms
Easy to convert between minterm and maxterm representations
For maxterm representation, select rows with 0’s x 1 y z G
G = xyz + xyz’ + x’yz
G = m7 + m6 + m3 = Σ(3, 6, 7)
G = M0M1M2M4M5 = Π(0,1,2,4,5)
G = (x+y+z)(x+y+z’)(x+y’+z)(x’+y+z)(x’+y+z’)
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

34. Saras M. Srivastava PGT CS, KV IISc, Bangalore
Karnaugh Maps
A Karnaugh map is a graphical tool for assisting in the general simplification procedure.
Two variable maps. A 1 B
F=AB +AB +AB  A B C F 1 +
Three variable maps. A 1 00 01 BC 11 10
F=AB’C’ +AB C +ABC +ABC  + A’B’C + A’BC’
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

35. Saras M. Srivastava PGT CS, KV IISc, Bangalore
Rules for K-Maps
We can reduce functions by circling 1’s in the K-map
Each circle represents minterm reduction
Following circling, we get minimized and-or form.
Rules to consider
Every cell containing a 1 must be included at least once.
The largest possible “power of 2 rectangle” must be enclosed.
The 1’s must be enclosed in the smallest possible number of rectangles.
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

36. Saras M. Srivastava PGT CS, KV IISc, Bangalore
Karnaugh Maps
Two variable maps. A 1 B
F=AB +AB +AB 
F=A+B
Three variable maps. A 1 00 01 BC 11 10
F=A+B C +BC 
F=AB’C’ +AB C +ABC +ABC  + A’B’C + A’BC’
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

37. Saras M. Srivastava PGT CS, KV IISc, Bangalore
Karnaugh Maps
Numbering scheme based on Gray–code
e.g., 00, 01, 11, 10
Only a single bit changes in code for adjacent map cells 00 01 AB C 1 11 10 B A
F(A,B,C) = m(0,4,5,7)
G(A,B,C) =
0 0
1 1 C B A
1 0
0 1
= AC + B’C’
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

38. Karnaugh Maps for Four Inputs
Saras M. Srivastava PGT CS, KV IISc, Bangalore
Karnaugh Maps for Four Inputs
Represent functions of 4 inputs with 16 minterms
Use same rules developed for 3-input functions
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

39. Karnaugh map: 4-variable example
Saras M. Srivastava PGT CS, KV IISc, Bangalore
Karnaugh map: 4-variable example
F(A,B,C,D) = m(0,2,5,8,9,10,11,12,13,14,15) F = C
+ A’BD
+ B’D’ AB D A B
1 0
0 1
0 0
1 1 C CD
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

40. Karnaugh maps: Don’t cares
Saras M. Srivastava PGT CS, KV IISc, Bangalore
Karnaugh maps: Don’t cares
f(A,B,C,D) = m(1,3,5,7,9) + d(6,12,13)
without don't cares
f =
A’D
+ C’D C f 1 X D A + B A AB CD 00 01 11 10 00 01
0 0
1 1
X 0
X 1 D C 11 10
1 1
0 X
0 0 B
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12
Boolean Algebra

41. Saras M. Srivastava PGT CS, KV IISc, Bangalore 12

42. Thank You
Saras M. Srivastava PGT CS, KV IISc, Bangalore 12