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The NAND gate as a universal gate Logic function NAND gate only AA A B A.BA.B A B A+B A B A B A B A A A B A.BA.B B A A B A B A B.

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Presentation on theme: "The NAND gate as a universal gate Logic function NAND gate only AA A B A.BA.B A B A+B A B A B A B A A A B A.BA.B B A A B A B A B."— Presentation transcript:

1 The NAND gate as a universal gate Logic function NAND gate only AA A B A.BA.B A B A+B A B A B A B A A A B A.BA.B B A A B A B A B

2 Gates with more than two inputs A B A. B. C=Y C A B Y C ABCDABCD Y A B Y C D A B A+B+C+D=Y C D A B Y C D A B Y C C B A A+B+C=Y

3 Gates with more than two inputs (cont.). = A B C D Y A B Y C D = =

4 NAND,NOR gates use to implement any Boolean operation

5 Gate conversion using inverter.

6 Boolean theorems (16) (x + y) = x. y (17) (x. y) = x + y DeMORGAN ’ S THEOREMS

7 COMBINATORIAL LOGIC CIRCUITS ALGEBRAIC SIMPLIFICATION Example 1

8 EXAMPLE

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11 Topdown design 1 Block diagram 2 Truth table 3 Boolean function 4 Simplify 5 Schematic 6 Test I/O Seq

12 EXAMPLE Converting circuits to NAND.

13 Example Sum-of-products NAND-NAND circuit

14 Example products -of- Sum NOR-NOR circuit

15 KANAUGH MAP METHOD KANAUGH MAP AND TRUTH TABLE

16 KANAUGH MAP

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19 Example of looping pairs

20 Example of looping groups of four.

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24 EXCLUSIVE-OR & EXCLUSIVE-NOR CIRCIUTS

25 Design a logic circuit, using x 1,x 0,y 1,y 0 inputs, whose output will be HIGH only when the two binary numbers x 1 x 0 and y 1 y 0 are equal.

26 PARITY GENRATOR AND CHECKER EX-OR gates used to implement parity generator and parity checker for even parity system.

27 INHIBIT CIRCUITS Four basic gates can either enable or inhibit the passage of and input signal, A, under control of the logic level at control input B.


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