 # 10/25/2004EE 42 fall 2004 lecture 231 Lecture #23 Synthesis Next week: Converting gates into circuits.

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10/25/2004EE 42 fall 2004 lecture 231 Lecture #23 Synthesis Next week: Converting gates into circuits

10/25/2004EE 42 fall 2004 lecture 232 Topics Today: Minimization versus other goals (Performance, cost, ….) Important properties of logic expressions DeMorgan’s Theorem Sum-of-Products Implementation

10/25/2004EE 42 fall 2004 lecture 233 Some Important Logical Functions “AND” “OR” “INVERT” or “NOT” “not AND” = NAND “not OR” = NOR exclusive OR = XOR (or ) AnotA

10/25/2004EE 42 fall 2004 lecture 234 These are circuits that accomplish a given logic function such as “OR”. We will shortly see how such circuits are constructed. Each of the basic logic gates has a unique symbol, and there are several additional logic gates that are regarded as important enough to have their own symbol. The set is: AND, OR, NOT, NAND, NOR, and EXCLUSIVE OR. Logic Gates A B C=A·B AND C = A B NAND C = NOR A B NOT A OR A B C=A+B EXCLUSIVE OR A B

10/25/2004EE 42 fall 2004 lecture 235 Multiple input gates And, Or, NAND, and NOR can be extended to multiple inputs easily AND O=(AB)  O=(ABCD…) OR O=(A+B)  O=(A+B+C+D…) Multiple inputs are indicated by just adding input lines to the symbols A B O=A·B·C AND NOR A C B C

10/25/2004EE 42 fall 2004 lecture 236 Generalized Logic Gates We have the standard logic gates: AND NOR NOT OR X OR We can generalize/simplify by using the small circle in any line for a NOT function (instead of showing a NOT gate.) EXAMPLES: a) A B B C b) c) B D a) b) c)

10/25/2004EE 42 fall 2004 lecture 237 With a combination of logic gates we can construct any logic function. In these two examples we will find the truth table for the circuit. Logic Circuits B A C It is helpful to list the intermediate logic values (at the input to the OR gate). Let’s call them X and Y. X Y Now we complete the truth tables for X and Y, and from that for C. (Note that X and Y and finally C = X + Y) ABXYC 00000 01011 10101 11000 Interestingly, this is the same truth table as the EXCLUSIVE OR

10/25/2004EE 42 fall 2004 lecture 238 Some Useful Theorems 1) 2) 3) 4) 5) 6) 7) 8) 9) } de Morgan’s Laws Each of these can be proved by writing out truth tables Communicative Associative Distributive Defined from form of truth tables

10/25/2004EE 42 fall 2004 lecture 239 Truth table to show de Morgan’s theorem ABA+BABAB 000011 011010 101010 111100

10/25/2004EE 42 fall 2004 lecture 2310 de Morgan’s Theorems de Morgan’s Theorems can be used repeatedly on complex logical expressions to put them into one of two standard forms, a sum of products, or a product of sums

10/25/2004EE 42 fall 2004 lecture 2311 Sum of Products In a sum of products standard form, each input appears no more than once in each term:

10/25/2004EE 42 fall 2004 lecture 2312 Using these properties we can often simplify expressions A B F Note that But factoring: So a simpler realization is: B F Just a wire !

10/25/2004EE 42 fall 2004 lecture 2313 Synthesis Designing the combinatorial logic circuit This method uses three different gate types and unless the expression is minimized does not lead to any kind of optimum circuit (its not the fastest, or cheapest, or lowest power way to construct the logic function). Method1: Certainly we may directly substitute gates for expressions There are two OR operations and two AND operations plus a NOT operation: Thus using 4 Gates plus a NOT: A B F C Example:

10/25/2004EE 42 fall 2004 lecture 2314 Synthesis Method 2: Similarly we may directly construct an expression and thus the circuit from the truth table. We can construct a sum of products form by taking each row, and then ANDing the variable from each column (or its inverse). Each of these become a term in an OR expression. ABF 000 011 100 111 Clearly A B F Obviously this expression and it’s realization are not optimal (F=B), but it shows that a solution can be obtained from simple rules, which can then be optimized for speed, area, or power, etc.

10/25/2004EE 42 fall 2004 lecture 2315 Synthesis If we look at a sum or products, we see that it can be converted into multiple AND gates each with multiple inputs (some inverting), and a final multiple input OR gate. A product of sums can be converted into multiple OR gates each with multiple inputs (some inverting), and a final multiple input AND gate.

10/25/2004EE 42 fall 2004 lecture 2316 NOR synthesis If we look at each of the terms in a sum of products representation, we can see that we can express them as a sum as well, so the whole expression can be done with only NOR gates

10/25/2004EE 42 fall 2004 lecture 2317 NAND Synthesis Designing the combinatorial logic circuit, cont. Starting with any SUM-OF-PRODUCTS expression: Y = ABC+DEF we can rewrite it by “inverting” with De Morgan: Method 3: NAND GATE SYNTHESIS. We can use De Morgan’s theorem to turn the sum-of-products expression into a form directly implementable entirely with NAND gates. (The NOT function is accomplished by a one-input NAND gate). The NAND realization, while based on DeMorgan’s theorem, is in fact much simpler: just look at the sum of products expression and use one NAND for each term and one to combine the terms. A B Y C D E F Clearly this expression is realized with three NAND gates: one three-input NAND for, one for, and one two-input gate to combine them:

10/25/2004EE 42 fall 2004 lecture 2318 Synthesis Designing the combinatorial logic circuit, cont. Two Examples of SUM-OF-PRODUCTS expressions: Method 3: NAND GATE SYNTHESIS (CONTINUED). (X-OR function) A X B (No connection) A Y B C We could make the drawings simpler by just using a circle for the NOT function rather than showing a one- input NAND gate

10/25/2004EE 42 fall 2004 lecture 2319 CMOS and complementary logic When we look at how to implement logic into transistors next week, we will see that we can use the complementary PMOS and NMOS switches in parallel or in series with complementary logic to form high speed, low power logic

10/25/2004EE 42 fall 2004 lecture 2320 CMOS NOR V DD A B A+B

10/25/2004EE 42 fall 2004 lecture 2321 CMOS NAND V DD A B AB

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