Gheorghe M. Ştefan

Synthesis problems 326 LUTs, f clock = 310 MHz Digital Integrated Circuits - week twelve2

97 LUTs Digital Integrated Circuits - week twelve3

33 LUTs, 506 MHz Digital Integrated Circuits - week twelve4

Timing in toyRISC The longest path is trough RALU, because in NextPC there is a 16-bit adder only T clock = t clock_to_instruction + t leftAddr_to_leftOp + t roughALU + t troughMUX + t fileRegSU Digital Integrated Circuits - week twelve5

The solution to improve speed Pipelining: Between toyRISC and memory On the RALU’s loop The price for pipelining: various latencies The problem will be solved in the course of Computer Architecture (Hennessy & Patterson: Computer Architecture. A Quantitative Approach) Digital Integrated Circuits - week twelve6

Four-Loop Systems ROM on loop: a computer with a dedicated function (embedded computing) RAM on loop: the generic computer LIFO on loop: processor with a language-oriented architecture (ex. LISP) PROCESSOR on loop: processor with a functional accelerator (ex. floating-point ops.) Digital Integrated Circuits - week twelve7

Computer: the strongest segregation between simple and complex COMPUTER = the simple PROCESSOR + the complex programs stored in RAM The function is given by: the Instruction Set Architecture The symbolic complex structure, stored in RAM, is interpreted by the simple structure of a machine Digital Integrated Circuits - week twelve8

Computing machine: a recursive approach Computing machine: The machine language (the architecture) The storage for a program written the machine language The machine to interpret the content of the storage: The machine language The storage The machine to interpret: … The machine to execute Digital Integrated Circuits - week twelve9

What about more loops? A computing machine requires at least 4 loops to be competent More loops are requested for a computing machine to improve the performance. Digital Integrated Circuits - week twelve10

toyMachine revisited The behavioral description (chapter 5) is implemented with 2429 LUTs and works at 164 MHz The structural description is implemented with 321 LUTs and works at 205 MHz The size is reduced 7.56 times The speed increases with 25% Digital Integrated Circuits - week twelve11