© 2001 By Default! A Free sample background from www.pptbackgrounds.fsnet.co.uk Slide 1 Optical Ethernet Design Results Status Presentation Receiver Group.

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Presentation transcript:

© 2001 By Default! A Free sample background from Slide 1 Optical Ethernet Design Results Status Presentation Receiver Group G1 Presenter: Geoffrey Sizemore David Gewertz Ryan Baldwin Presented : March 28, 2002

© 2001 By Default! A Free sample background from Slide 2 Highlights Testing the Intel testbed from last semester Setting up Maxim evaluation boards with new Gb Ethernet test equipment Applying Maxim knowledge to new board design Learning Eagle PCB design software Making a new board layout

© 2001 By Default! A Free sample background from Slide 3 Intel Gb Test-bed

© 2001 By Default! A Free sample background from Slide 4 Intel Gb Test-bed Results Testing showed no packet loss *discrepancy in tx/rx packets due to lack of termination synchronization between transmitter and receiver

© 2001 By Default! A Free sample background from Slide 5 Block Diagram of Maxim Setup Oscilloscope TDS GND Dual Output Variable Power Supply BERTS GTS1250 Out +Out - Note: Scope gets clock signal from BERTS

© 2001 By Default! A Free sample background from Slide 6 Simulated Maxim Setup PRBS Signal (2 7 -1)TDS7154 Screen Capture Maxim Boards

© 2001 By Default! A Free sample background from Slide 7 Maxim Knowledge Lack of DC cancellation network created huge jitter Single Power supply implementation did not introduce noise to system due to filtering networks on the evaluation boards

© 2001 By Default! A Free sample background from Slide 8 Redundant Maxim Components Photodiode Emulation Ferrite Beads (High-Frequency Noise Reduction)

© 2001 By Default! A Free sample background from Slide 9 Unused Maxim Features

© 2001 By Default! A Free sample background from Slide 10 Initial Draft of Layout

© 2001 By Default! A Free sample background from Slide 11 PCB Layout Software Extensive library of components and easy-to-use interface And it’s “FREE! FREE! FREE!” © Matthew Lesko FREE!

© 2001 By Default! A Free sample background from Slide 12 Receiver Board Layout SMA Connectors Power Connectors Supply Traces GND Traces

© 2001 By Default! A Free sample background from Slide 13 Conclusions Successful in setting up and testing the Intel testbed and Maxim boards Maxim data sheets and board layouts provided an excellent learning tool for board design New board design takes into account all the factors discussed in class – –Transmission lines and trace restrictions – –Decoupling and separation of supply signals – –Board limitations as outlined by Bob House Any questions?