CSET 4650 Field Programmable Logic Devices

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Presentation transcript:

CSET 4650 Field Programmable Logic Devices Logic Implementation Using Programmable ROMs CSET 4650 Field Programmable Logic Devices For additional information, contact any of the following individuals: Dan Solarek Professor and Chairman dsolarek@utnet.utoledo.edu dsolarek@eng.utoledo.edu Voice: 419-530-3377 Allen Rioux Director of Online Services arioux@toledolink.com arioux@utnet.utoledo.edu To leave a message for any of these individuals call the department secretary at 419-530-3159. You may send a FAX to 419-530-3068 Dan Solarek Richard Springman Director of Student Services rspringm@utnet.utoledo.edu rspringm@eng.utoledo.edu Voice: 419-530-3276 Myrna Swanberg Academic Program Coordinator mswanbe@utnet.utoledo.edu mswanber@eng.utoledo.edu Voice: 419-530-3062

Programmable Read Only Memory A ROM is a memory device that holds a fixed, addressable data set A PROM may be programmed by the designer UV erasable PROM

Programmable Read Only Memory Typical uses include: Code converters Character generators Data storage tables Program stores Loaded with tabular data – not Boolean equations e.g., a truth table

Conceptual PROM Architecture 32x8 PROM 5-to-32 decoder 8 OR gates with 32 inputs 32x8 internal programmable connections k = 5 2k = 32 programmable OR connections output word (8-bits)

Conceptual PROM Architecture A PROM has a fixed AND array (that decodes the memory address) followed by a programmable OR array (outputs) For each of a given set of input combinations (address), it generates a multi-bit value which has been programmed into the device

Using PROMs as PLDs The output functions need to be expressed in canonical minterm form for PROM implementation every input variable appears in each product term in its true or inverted form Each minterm is used to represent an address Each address generates a multi-bit output

Realistic PROM Architecture decoder logic A PROM has a fixed AND array and a programmable OR array Remember, we are only programming the CONNECTIONS to the OR gates AND gate connections are all possible combinations

Simplified PROM Architecture Inputs A and B true and inverted Outputs Y and Z e.g., two functions Programmable connections to OR gates 0 0 0 1 1 0 1 1

Example 7-11 from Sandige Binary to hex character generator OA OC OD OE OB OF OG Binary to hex character generator Using a seven-segment display device and the character scheme at right