12006 MAPLD International ConferenceSpaceWire 101 Seminar Distributed Interrupts for Real-Time Control in SpaceWire-Based On-Board Systems 2006 MAPLD International Conference Washington, D.C. September 25, 2006 Yuriy Sheynin, Sergey Gorbachev St. Petersburg State University of Aerospace Instrumentation Institute of High-Performance Computer and Network Technologies

22006 MAPLD International ConferenceSpaceWire 101 Seminar Towards integral interconnection infrastructure for onboard systems Modern satellite and spacecraft distributed on-board systems have several (3-5) separate interconnections for different types of information and signals: sensor buses for data streams from sensors and instruments command buses for commands from control units to instruments and spacecraft equipment telemetry busses for telemetry data data buses for data exchange between computing modules in the course of data and signal processing time synchronization buses for on-board clock synchronization sideband signals for hard real-time signaling and control Next generation modular spacecraft avionics should move towards integral interconnection infrastructure SpaceWire is a candidate technology for such integral on- board interconnections

32006 MAPLD International ConferenceSpaceWire 101 Seminar The time codes distribution is a SpaceWire feature to substitute sideband signals for distributed systems clock synchronization. It is a clear advantage of the SpaceWire over other interconnection standards Other signals, besides the time codes, are needed also to be distributed in SpaceWire-based interconnections It is important to have them at the low protocol layer, in order to get high priority distribution, minimum latencies, to traverse blocked by data links, etc. It is ensured for time codes. Should be ensured for other signals also. Time codes distribution is a SpaceWire advantage

42006 MAPLD International ConferenceSpaceWire 101 Seminar Sideband signals into SpaceWire core interconnection Distributed on-board real-time systems need some signals (e.g., interrupts) distribution. Sideband signal lines are used in previous generation on- board architectures The trend in modern interconnections exclude sideband signals, include transfer of events, interrupts, etc. in the core interconnection itself, in its protocols; PCI Express is a good example The SpaceWire also needs adequate means for substitution of sideband signals by its core interconnection means for signal distribution

52006 MAPLD International ConferenceSpaceWire 101 Seminar –How many different signals? –What should be a mechanism for them? –How it correlates with the current and future SpaceWire standard releases? –To be aware: how it correlates with existing already SpaceWire implementations. The questions :

62006 MAPLD International ConferenceSpaceWire 101 Seminar Proposal for next SpaceWire standard release:  Up to 64 different signals  Fits in the current SpaceWire character coding format  Leaves a space in the character coding format for further extension  Different, to the time-codes, mechanism for signal distribution: The reason: to have compact implementations for a mechanism that can support dozens of different signals running simultaneously in an interconnection  Do not violate fixed part of the SpaceWire standard, do not cause conflicts with existing SpaceWire standard compliant implementations Distributed Interrupts mechanism in SpaceWire

72006 MAPLD International ConferenceSpaceWire 101 Seminar Distributed Interrupts and Signals NULL=ESC+FCT P100 “Time-codes” extensions – Usage of Control Flags ( bits T6 and T7 of Time codes Usage of Control Flags ( bits T6 and T7 of Time codes ) Time-code b) ESC + N-Char T2T3T4T T0T1 P111 a) ESC+L-char Interrupt-code I2I3I4I I0I1 P111 Poll-code I2I3I4I I0I1 P111 T6 T7 P111 E2E3E4E E0E1 P111 Extension-code Extension-code (reserved)

82006 MAPLD International ConferenceSpaceWire 101 Seminar Interrupt Code 15h Interrupt in Master node Host Interrupt 15h request 0000…0…000 1 Interrupt 15h reset 21 st bit Link controller 64-bit interrupt source register ( ISR ) INTR_IN signal Poll_OUT signal SpaceWire link Poll code 15h

92006 MAPLD International ConferenceSpaceWire 101 Seminar Poll Code 15h Interrupt code Interrupt code in Target node Interrupt 15h Host Poll 15h request 0000…0… st bit 1 Link controller 64-bit interrupt source register ( ISR ) Poll_IN signal INTR_OUT signal SpaceWire link Interrupt code 15 h

MAPLD International ConferenceSpaceWire 101 Seminar Interrupt code Interrupt code in a Router node (‘ 0 ’ in ISR ) 64-bit interrupt source register ( ISR ) 0000…0… st bit 1 Interrupt 15h Interrupt Code 15h INTR_IN signal Link controller j SpaceWire link INTR_IN signal Link controller k SpaceWire link Link controller i INTR_IN signal INTR_OU T signal SpaceWire link Interrupt code 15 h

MAPLD International ConferenceSpaceWire 101 Seminar Link controller i INTR_IN signal INTR_OU T signal SpaceWire link Interrupt code Interrupt code processing in a Router node (‘1’ in ISR) 64-bit interrupt source register ( ISR ) 0000…1… st bit ( 15h ) INTR_IN signal Link controller k SpaceWire link INTR_IN signal Link controller j SpaceWire link Interrupt code 15 h

MAPLD International ConferenceSpaceWire 101 Seminar Poll Code 15h Poll_IN signal Link controller k SpaceWire link Poll 15h Poll_IN signal Link controller j SpaceWire link Poll 15h Poll code Poll code processing in a Router node (‘1’ in ISR) 64-bit interrupt source register ( ISR ) 0000…0… st bit 1 Link controller i Poll_IN signal Poll_OUT signal SpaceWire link Poll code 15 h

MAPLD International ConferenceSpaceWire 101 Seminar Poll 15h Poll code Poll code in a Router node (‘ 0 ’) 64-bit interrupt source register ( ISR ) 0000…0… st bit Poll Code 15h Poll_IN signal Link controller j SpaceWire link Poll_IN signal Link controller k SpaceWire link Link controller i Poll_IN signal Poll_OUT signal SpaceWire link Poll code 15 h

MAPLD International ConferenceSpaceWire 101 Seminar Interrupt-code: interrupt request. IRQ vector I=60h Node 82 Master Router 1 Router 2 Router 3 Node 74 Master Node 64 Slave Node 60 Slave Poll-code: polling interrupt source status. Packet: sending interrupt request source status. I=60h

MAPLD International ConferenceSpaceWire 101 Seminar Interrupt/Poll codes do not cause conflicts with existing SpaceWire standard compliant implementations Interrupt/Poll codes are in conflict with Multi-Time codes So,… To have an interoperability Modes of operation, set in the Configuration: either Interrupt/Poll codes, or Multi-Time codes. (also PCI PCI-X compatibility is an example of the approach) Not include in the SpaceWire standard neither Interrupt/Poll codes, nor Multi-Time codes. Treat them both as Logical (virtual) Sideband signals –NASA Multi-Time codes –RFSA Interrupt/Poll codes Tunneling of “alternative” through the both type routers To study carefully both Interrupt/Poll codes and Multi-Time codes specifications. Investigate particular level of their interoperability /non- interoperability.

MAPLD International ConferenceSpaceWire 101 Seminar Interrupt/Poll codes in SpaceWire. Conclusion Former sideband signals, like interrupts, are integrated into SpaceWire interconnections Up to 64 different signals can be distributed in an interconnection simultaneously Interrupt/Poll codes are specified at the Symbol level. They have high priority for transmission and switching (next to Time codes) Interrupt/Poll codes are distributed regardless of data transmission, cutting into data symbols flow at any link – idle, busy, blocked for data Interrupt/Poll codes ensure low latency distribution. Latency boundaries can be estimated for a SpaceWire interconnection topology Interrupt/Poll codes do not cause conflicts with existing SpaceWire standard and compliant with it implementations Interrupt/Poll codes are implemented in our ASIC and FPGA SpaceWire implementation

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