CMPUT Computer Organization and Architecture II1 CMPUT329 - Fall 2003 Computer Organization and Architecture II José Nelson Amaral

CMPUT Computer Organization and Architecture II2 Problem 1 The following is a legal add instruction in the MIPS R2000 microprocessor: add $s1, $s2, $s3 How is the addition of two integers constructed from these three basic operations? We know that all the functions of a digital computer are implemented from three basic logic operations: AND, OR, and NOT.

CMPUT Computer Organization and Architecture II3 Problem 2 Given a hardware prototyping board equiped with an FPGA, SRAM, Microcontroller, Parallel Port, etc, how would you implement the following systems: A House Alarm System A Music Recorder/Player A Multi-Mode Calculator A Scrolling Display An Encrypted Communication System

CMPUT Computer Organization and Architecture II4 Course Outline zBoolean Algebra zAlgebraic Simplification zKarnaugh Maps zQuine-McCluskey zMultiplexes, Decoders, ROMs, PLAs zCombinatorial Circuits zFlip-Flops zSequential Circuits zClocked Seq. Circuits zFinite State Machines zState Assign. Problem zProgram. Logic Devices zHazards

CMPUT Computer Organization and Architecture II6 Xilinx University Program

CMPUT Computer Organization and Architecture II7 Some interesting, and important questions zWhat are we doing here? zWhat do we expect? zWhat do we know? zWhy should a Computer Scientist learn Logic Design?

CMPUT Computer Organization and Architecture II8 Instructor:Prof. José Nelson Amaral Office:ATH 3-42 Phone: Office Hours:10:00-11:00 am (Wed.) 2:00-3:00 pm TA:A.K.M. Ashikur Rahman (Ashique) Office Hours:TBA Lab: Comp. Sci Center Admin. Information

CMPUT Computer Organization and Architecture II9 Important Dates September 17 (Tuesday) : first lab class October 23 (Wednesday) : mid-term exam December 04 (Wednesday) : last day of classes December 13, 9 AM (Friday) : final exam Course work will carry the following weights towards your final grade: Lab. Assignments: 20% Midterm Exam: 25% Homeworks:20% Final Exam:35%

CMPUT Computer Organization and Architecture II10 CS329 Honor Code By turning the solution of the homework for grading, I certify that I have worked all the solutions on my own, that I have not copied or transcribed solutions from a classmate, someone outside the class, or from any other source. I also certify that I have not facilitated or allowed any of my classmates to copy my own solutions. I am aware that the violation of this honor code constitutes a breach of the trust granted me by the teaching staff, compromises my reputation, and subjects me to the penalties prescribed in Section 26.1 of the University of Alberta 2002/2003 Calendar. I am aware that students are encouraged to discuss the material covered in the class and to work examples together. However, the joint solution of problems assigned as individual homework exercises is not allowed.

CMPUT Computer Organization and Architecture II11 Some Sad Statistics in Computing Science 21 cases of plagiarism in the 2000/2001 Academic Year:

CMPUT Computer Organization and Architecture II12 Late Submission Policy zThere will be a penalty of 10% of the grade per consecutive day of delay. This penalty is applied across the board and independent of justification. zDeferred exams will be scheduled for early January, and will be different from the final given on the scheduled date.

CMPUT Computer Organization and Architecture II13 Initial Quizes zSeptember 09 (Monday): Chapter 1 zSeptember 13 (Friday): Chapter 2 zSeptember 20 (Friday): Chapter 3 xEmphasys on sections 3.1, 3.2, 3.3.1, 3.3.2, 3.3.3, 3.4.1, 3.6.1, 3.6.2, 3.7.2, 3.7.3, 3.9.1, 3.9.3

CMPUT Computer Organization and Architecture II14 Bibliography Texbook: Wakerly, John F., Digital Design: Principles and Practices, Prentice Hall, Upper Saddle River, NJ, ISBN VHDL Book (References): Yalamanchili, Introductory VHDL: From Simulation to Synthesis, 2001, Prentice Hall, Upper Saddle River, NJ, ISBN Ashenden, Peter J., The Designer’s Guide to VHDL, Morgan Kaufmann Pub., San Francisco, CA, ISBN

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